sram_test.qsf

Verilog语言对SRAM的操作,也提一些简单的快速操作SRAM的技巧。

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		sram_test_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name DEVICE EPM240T100C5
set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name TOP_LEVEL_ENTITY sram_test
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "14:20:52  OCTOBER 19, 2001"
set_global_assignment -name LAST_QUARTUS_VERSION 8.1
set_location_assignment PIN_12 -to clk
set_location_assignment PIN_44 -to rst_n
set_location_assignment PIN_21 -to led
set_location_assignment PIN_70 -to sram_addr[14]
set_location_assignment PIN_75 -to sram_addr[13]
set_location_assignment PIN_69 -to sram_addr[12]
set_location_assignment PIN_72 -to sram_addr[11]
set_location_assignment PIN_71 -to sram_addr[10]
set_location_assignment PIN_73 -to sram_addr[9]
set_location_assignment PIN_74 -to sram_addr[8]
set_location_assignment PIN_68 -to sram_addr[7]
set_location_assignment PIN_67 -to sram_addr[6]
set_location_assignment PIN_66 -to sram_addr[5]
set_location_assignment PIN_61 -to sram_addr[4]
set_location_assignment PIN_58 -to sram_addr[3]
set_location_assignment PIN_57 -to sram_addr[2]
set_location_assignment PIN_56 -to sram_addr[1]
set_location_assignment PIN_55 -to sram_addr[0]
set_location_assignment PIN_51 -to sram_data[7]
set_location_assignment PIN_50 -to sram_data[6]
set_location_assignment PIN_49 -to sram_data[5]
set_location_assignment PIN_48 -to sram_data[4]
set_location_assignment PIN_47 -to sram_data[3]
set_location_assignment PIN_52 -to sram_data[2]
set_location_assignment PIN_53 -to sram_data[1]
set_location_assignment PIN_54 -to sram_data[0]
set_location_assignment PIN_76 -to sram_wr_n
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim (Verilog)"
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VERILOG -section_id eda_simulation
set_global_assignment -name VERILOG_FILE sram_test.v