sram_test.flow.rpt

Verilog语言对SRAM的操作,也提一些简单的快速操作SRAM的技巧。

Flow report for sram_test
Thu Feb 12 09:21:16 2009
Quartus II Version 8.1 Build 163 10/28/2008 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Flow Summary
  3. Flow Settings
  4. Flow Non-Default Global Settings
  5. Flow Elapsed Time
  6. Flow OS Summary
  7. Flow Log



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+--------------------------------------------------------------------+
; Flow Summary                                                       ;
+-------------------------+------------------------------------------+
; Flow Status             ; Successful - Thu Feb 12 09:21:16 2009    ;
; Quartus II Version      ; 8.1 Build 163 10/28/2008 SJ Full Version ;
; Revision Name           ; sram_test                                ;
; Top-level Entity Name   ; sram_test                                ;
; Family                  ; MAX II                                   ;
; Device                  ; EPM240T100C5                             ;
; Timing Models           ; Final                                    ;
; Met timing requirements ; Yes                                      ;
; Total logic elements    ; 85 / 240 ( 35 % )                        ;
; Total pins              ; 27 / 80 ( 34 % )                         ;
; Total virtual pins      ; 0                                        ;
; UFM blocks              ; 0 / 1 ( 0 % )                            ;
+-------------------------+------------------------------------------+


+-----------------------------------------+
; Flow Settings                           ;
+-------------------+---------------------+
; Option            ; Setting             ;
+-------------------+---------------------+
; Start date & time ; 02/12/2009 09:21:02 ;
; Main task         ; Compilation         ;
; Revision Name     ; sram_test           ;
+-------------------+---------------------+


+------------------------------------------------------------------------------------------------------+
; Flow Non-Default Global Settings                                                                     ;
+------------------------+------------------------------+---------------+-------------+----------------+
; Assignment Name        ; Value                        ; Default Value ; Entity Name ; Section Id     ;
+------------------------+------------------------------+---------------+-------------+----------------+
; COMPILER_SIGNATURE_ID  ; 133845674237.123440166203440 ; --            ; --          ; --             ;
; EDA_OUTPUT_DATA_FORMAT ; Verilog                      ; --            ; --          ; eda_simulation ;
; EDA_SIMULATION_TOOL    ; ModelSim (Verilog)           ; <None>        ; --          ; --             ;
; EDA_TIME_SCALE         ; 1 ps                         ; --            ; --          ; eda_simulation ;
+------------------------+------------------------------+---------------+-------------+----------------+


+-----------------------------------------------------------------------------------------------------------------------------+
; Flow Elapsed Time                                                                                                           ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Module Name             ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Analysis & Synthesis    ; 00:00:01     ; 1.0                     ; 165 MB              ; 00:00:02                           ;
; Fitter                  ; 00:00:01     ; 1.0                     ; 169 MB              ; 00:00:01                           ;
; Assembler               ; 00:00:01     ; 1.0                     ; 129 MB              ; 00:00:01                           ;
; Classic Timing Analyzer ; 00:00:01     ; 1.0                     ; 116 MB              ; 00:00:01                           ;
; EDA Netlist Writer      ; 00:00:01     ; 1.0                     ; 116 MB              ; 00:00:01                           ;
; Total                   ; 00:00:05     ; --                      ; --                  ; 00:00:06                           ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+


+---------------------------------------------------------------------------------------+
; Flow OS Summary                                                                       ;
+-------------------------+------------------+------------+------------+----------------+
; Module Name             ; Machine Hostname ; OS Name    ; OS Version ; Processor type ;
+-------------------------+------------------+------------+------------+----------------+
; Analysis & Synthesis    ; aero4            ; Windows XP ; 5.1        ; i686           ;
; Fitter                  ; aero4            ; Windows XP ; 5.1        ; i686           ;
; Assembler               ; aero4            ; Windows XP ; 5.1        ; i686           ;
; Classic Timing Analyzer ; aero4            ; Windows XP ; 5.1        ; i686           ;
; EDA Netlist Writer      ; aero4            ; Windows XP ; 5.1        ; i686           ;
+-------------------------+------------------+------------+------------+----------------+


------------
; Flow Log ;
------------
quartus_map --read_settings_files=on --write_settings_files=off sram_test -c sram_test
quartus_fit --read_settings_files=off --write_settings_files=off sram_test -c sram_test
quartus_asm --read_settings_files=off --write_settings_files=off sram_test -c sram_test
quartus_tan --read_settings_files=off --write_settings_files=off sram_test -c sram_test
quartus_eda --read_settings_files=off --write_settings_files=off sram_test -c sram_test