io_map.c

MC9S12NE64串口与网络通信源代码

 /*****************************************************************************
 *
 * File Name     : IO_Map.c
 *
 * DESCRIPTION   : Used to define the registors  
 *
 * It is generated by codewarrior 
 * 
 *****************************************************************************/


#include "IO_Map.h"


volatile ARMCOPSTR _ARMCOP;                                /* CRG COP Timer Arm/Reset Register */
volatile ATDSTAT0STR _ATDSTAT0;                            /* ATD Status Register 0 */
volatile ATDSTAT1STR _ATDSTAT1;                            /* ATD Status Register 1 */
volatile ATDSTAT2STR _ATDSTAT2;                            /* ATD Status Register 2 */
volatile ATDTEST1STR _ATDTEST1;                            /* ATD Test Register */
volatile CFORCSTR _CFORC;                                  /* Timer Compare Force Register */
volatile CLKSELSTR _CLKSEL;                                /* CRG Clock Select Register */
volatile COPCTLSTR _COPCTL;                                /* CRG COP Control Register */
volatile CRGFLGSTR _CRGFLG;                                /* CRG Flags Register */
volatile CRGINTSTR _CRGINT;                                /* CRG Interrupt Enable Register */
volatile DBGC1STR _DBGC1;                                  /* Debug Control Register 1 */
volatile DBGC2STR _DBGC2;                                  /* Debug Control Register 2 */
volatile DBGC3STR _DBGC3;                                  /* Debug Control Register 3 */
volatile DBGCAXSTR _DBGCAX;                                /* Debug Comparator A Extended Register */
volatile DBGCBXSTR _DBGCBX;                                /* Debug Comparator B Extended Register */
volatile DBGCCXSTR _DBGCCX;                                /* Debug Comparator C Extended Register */
volatile DBGCNTSTR _DBGCNT;                                /* Debug Count Register */
volatile DBGSCSTR _DBGSC;                                  /* Debug Status and Control Register */
volatile DDRESTR _DDRE;                                    /* Port E Data Direction Register */
volatile DDRGSTR _DDRG;                                    /* Port G Data Direction Register */
volatile DDRHSTR _DDRH;                                    /* Port H Data Direction Register */
volatile DDRJSTR _DDRJ;                                    /* Port J Data Direction Register */
volatile DDRKSTR _DDRK;                                    /* Port K Data Direction Register */
volatile DDRLSTR _DDRL;                                    /* Port L Data Direction Register */
volatile DDRSSTR _DDRS;                                    /* Port S Data Direction Register */
volatile DDRTSTR _DDRT;                                    /* Port T Data Direction Register */
volatile EBICTLSTR _EBICTL;                                /* External Bus Interface Control */
volatile EPHYCTL0STR _EPHYCTL0;                            /* Ethernet Physical Transceiver Control Register 0 */
volatile EPHYCTL1STR _EPHYCTL1;                            /* Ethernet Physical Transceiver Control Register 1 */
volatile EPHYSRSTR _EPHYSR;                                /* Ethernet Physical Transceiver Status Register */
volatile ETCTLSTR _ETCTL;                                  /* Ethertype Control */
volatile FCLKDIVSTR _FCLKDIV;                              /* Flash Clock Divider Register */
volatile FCMDSTR _FCMD;                                    /* Flash Command Buffer and Register */
volatile FCNFGSTR _FCNFG;                                  /* Flash Configuration Register */
volatile FPROTSTR _FPROT;                                  /* Flash Protection Register */
volatile FSECSTR _FSEC;                                    /* Flash Security Register */
volatile FSTATSTR _FSTAT;                                  /* Flash Status Register */
volatile HPRIOSTR _HPRIO;                                  /* Highest Priority I Interrupt */
volatile IBADSTR _IBAD;                                    /* IIC Address Register */
volatile IBCRSTR _IBCR;                                    /* IIC Control Register */
volatile IBDRSTR _IBDR;                                    /* IIC Data I/O Register */
volatile IBFDSTR _IBFD;                                    /* IIC Frequency Divider Register */
volatile IBSRSTR _IBSR;                                    /* IIC Status Register */
volatile INITRGSTR _INITRG;                                /* Initialization of Internal Register Position Register */
volatile INITRMSTR _INITRM;                                /* Initialization of Internal RAM Position Register */
volatile INTCRSTR _INTCR;                                  /* Interrupt Control Register */
volatile ITCRSTR _ITCR;                                    /* Interrupt Test Control Register */
volatile ITESTSTR _ITEST;                                  /* Interrupt Test Register */
volatile MCMSTSTR _MCMST;                                  /* MII Command and Status */
volatile MEMSIZ0STR _MEMSIZ0;                              /* Memory Size Register Zero */
volatile MEMSIZ1STR _MEMSIZ1;                              /* Memory Size Register One */
volatile MISCSTR _MISC;                                    /* Miscellaneous Mapping Control Register */
volatile MODESTR _MODE;                                    /* Mode Register */
volatile MPADRSTR _MPADR;                                  /* MII PHY Address */
volatile MRADRSTR _MRADR;                                  /* MII Register Address */
volatile MTST0STR _MTST0;                                  /* MTST0 */
volatile MTST1STR _MTST1;                                  /* MTST1 */
volatile NETCTLSTR _NETCTL;                                /* Network Control */
volatile OC7DSTR _OC7D;                                    /* Output Compare 7 Data Register */
volatile OC7MSTR _OC7M;                                    /* Output Compare 7 Mask Register */
volatile PACTLSTR _PACTL;                                  /* 16-Bit Pulse Accumulator A Control Register */
volatile PAFLGSTR _PAFLG;                                  /* Pulse Accumulator A Flag Register */
volatile PARTIDHSTR _PARTIDH;                              /* Part ID Register High */
volatile PARTIDLSTR _PARTIDL;                              /* Part ID Register Lw */
volatile PEARSTR _PEAR;                                    /* Port E Assignment Register */
volatile PERGSTR _PERG;                                    /* Port G Pull Device Enable Register */
volatile PERHSTR _PERH;                                    /* Port H Pull Device Enable Register */
volatile PERJSTR _PERJ;                                    /* Port J Pull Device Enable Register */
volatile PERLSTR _PERL;                                    /* Port L Pull Device Enable Register */
volatile PERSSTR _PERS;                                    /* Port S Pull Device Enable Register */
volatile PERTSTR _PERT;                                    /* Port T Pull Device Enable Register */
volatile PIEGSTR _PIEG;                                    /* Port G Interrupt Enable Register */
volatile PIEHSTR _PIEH;                                    /* Port H Interrupt Enable Register */
volatile PIEJSTR _PIEJ;                                    /* Port J Interrupt Enable Register */
volatile PIFGSTR _PIFG;                                    /* Port G Interrupt Flag Register */
volatile PIFHSTR _PIFH;                                    /* Port H Interrupt Flag Register */
volatile PIFJSTR _PIFJ;                                    /* Port J Interrupt Flag Register */
volatile PLLCTLSTR _PLLCTL;                                /* CRG PLL Control Register */
volatile PORTAD1STR _PORTAD1;                              /* Port AD1 Data Register */
volatile PORTESTR _PORTE;                                  /* Port E Register */
volatile PORTKSTR _PORTK;                                  /* Port K Data Register */
volatile PPAGESTR _PPAGE;                                  /* Page Index Register */
volatile PPSGSTR _PPSG;                                    /* Port G Polarity Select Register */
volatile PPSHSTR _PPSH;                                    /* Port H Polarity Select Register */
volatile PPSJSTR _PPSJ;                                    /* PortJP Polarity Select Register */
volatile PPSLSTR _PPSL;                                    /* Port L Polarity Select Register */