prev_cmp_lift.fit.qmsg

不同于网上的四层电梯

{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "5.043 ns register register " "Info: Estimated most critical path is register to register delay of 5.043 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns \\ctrlift:pos\[0\] 1 REG LAB_X60_Y21 43 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X60_Y21; Fanout = 43; REG Node = '\\ctrlift:pos\[0\]'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { \ctrlift:pos[0] } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.948 ns) + CELL(0.150 ns) 1.098 ns Mux1~124 2 COMB LAB_X59_Y20 2 " "Info: 2: + IC(0.948 ns) + CELL(0.150 ns) = 1.098 ns; Loc. = LAB_X59_Y20; Fanout = 2; COMB Node = 'Mux1~124'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.098 ns" { \ctrlift:pos[0] Mux1~124 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 276 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.621 ns) + CELL(0.419 ns) 2.138 ns Mux4~22 3 COMB LAB_X60_Y21 1 " "Info: 3: + IC(0.621 ns) + CELL(0.419 ns) = 2.138 ns; Loc. = LAB_X60_Y21; Fanout = 1; COMB Node = 'Mux4~22'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.040 ns" { Mux1~124 Mux4~22 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 286 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.290 ns) + CELL(0.271 ns) 2.699 ns Mux4~23 4 COMB LAB_X60_Y21 1 " "Info: 4: + IC(0.290 ns) + CELL(0.271 ns) = 2.699 ns; Loc. = LAB_X60_Y21; Fanout = 1; COMB Node = 'Mux4~23'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.561 ns" { Mux4~22 Mux4~23 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 286 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.290 ns) + CELL(0.275 ns) 3.264 ns mylift~3191 5 COMB LAB_X60_Y21 1 " "Info: 5: + IC(0.290 ns) + CELL(0.275 ns) = 3.264 ns; Loc. = LAB_X60_Y21; Fanout = 1; COMB Node = 'mylift~3191'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.565 ns" { Mux4~23 mylift~3191 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 36 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.145 ns) + CELL(0.420 ns) 3.829 ns mylift~3194 6 COMB LAB_X60_Y21 2 " "Info: 6: + IC(0.145 ns) + CELL(0.420 ns) = 3.829 ns; Loc. = LAB_X60_Y21; Fanout = 2; COMB Node = 'mylift~3194'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.565 ns" { mylift~3191 mylift~3194 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 36 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.415 ns) + CELL(0.150 ns) 4.394 ns Selector8~286 7 COMB LAB_X60_Y21 1 " "Info: 7: + IC(0.415 ns) + CELL(0.150 ns) = 4.394 ns; Loc. = LAB_X60_Y21; Fanout = 1; COMB Node = 'Selector8~286'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.565 ns" { mylift~3194 Selector8~286 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 61 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.145 ns) + CELL(0.420 ns) 4.959 ns Selector8~287 8 COMB LAB_X60_Y21 1 " "Info: 8: + IC(0.145 ns) + CELL(0.420 ns) = 4.959 ns; Loc. = LAB_X60_Y21; Fanout = 1; COMB Node = 'Selector8~287'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.565 ns" { Selector8~286 Selector8~287 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 61 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.084 ns) 5.043 ns mylift.doorclose 9 REG LAB_X60_Y21 6 " "Info: 9: + IC(0.000 ns) + CELL(0.084 ns) = 5.043 ns; Loc. = LAB_X60_Y21; Fanout = 6; REG Node = 'mylift.doorclose'" {  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.084 ns" { Selector8~287 mylift.doorclose } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 36 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.189 ns ( 43.41 % ) " "Info: Total cell delay = 2.189 ns ( 43.41 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.854 ns ( 56.59 % ) " "Info: Total interconnect delay = 2.854 ns ( 56.59 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "5.043 ns" { \ctrlift:pos[0] Mux1~124 Mux4~22 Mux4~23 mylift~3191 mylift~3194 Selector8~286 Selector8~287 mylift.doorclose } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 2 " "Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 2%" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "X55_Y12 X65_Y23 " "Info: The peak interconnect region extends from location X55_Y12 to location X65_Y23" {  } {  } 0 0 "The peak interconnect region extends from location %1!s! to location %2!s!" 0 0 "" 0}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0 "" 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0 "" 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "" 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0}
{ "Warning" "WDAT_NO_LOADING_SPECIFIED_ONE_OR_MORE_PINS" "28 " "Warning: Found 28 output pins without output pin load capacitance assignment" { { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "fuplight\[1\] 0 " "Info: Pin \"fuplight\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "fuplight\[2\] 0 " "Info: Pin \"fuplight\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "fuplight\[3\] 0 " "Info: Pin \"fuplight\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "fuplight\[4\] 0 " "Info: Pin \"fuplight\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "fuplight\[5\] 0 " "Info: Pin \"fuplight\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "fdnlight\[2\] 0 " "Info: Pin \"fdnlight\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "fdnlight\[3\] 0 " "Info: Pin \"fdnlight\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "fdnlight\[4\] 0 " "Info: Pin \"fdnlight\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "fdnlight\[5\] 0 " "Info: Pin \"fdnlight\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "fdnlight\[6\] 0 " "Info: Pin \"fdnlight\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "stoplight\[1\] 0 " "Info: Pin \"stoplight\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "stoplight\[2\] 0 " "Info: Pin \"stoplight\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "stoplight\[3\] 0 " "Info: Pin \"stoplight\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "stoplight\[4\] 0 " "Info: Pin \"stoplight\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "stoplight\[5\] 0 " "Info: Pin \"stoplight\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "stoplight\[6\] 0 " "Info: Pin \"stoplight\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "position\[0\] 0 " "Info: Pin \"position\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "position\[1\] 0 " "Info: Pin \"position\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "position\[2\] 0 " "Info: Pin \"position\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "lightout\[0\] 0 " "Info: Pin \"lightout\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "lightout\[1\] 0 " "Info: Pin \"lightout\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "lightout\[2\] 0 " "Info: Pin \"lightout\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "lightout\[3\] 0 " "Info: Pin \"lightout\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "lightout\[4\] 0 " "Info: Pin \"lightout\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "lightout\[5\] 0 " "Info: Pin \"lightout\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "lightout\[6\] 0 " "Info: Pin \"lightout\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "doorlight 0 " "Info: Pin \"doorlight\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "udsig 0 " "Info: Pin \"udsig\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0}  } {  } 0 0 "Found %1!d! output pins without output pin load capacitance assignment" 0 0 "" 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0}
{ "Warning" "WFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "1 " "Warning: Following 1 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "lightout\[1\] VCC " "Info: Pin lightout\[1\] has VCC driving its datain port" {  } { { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 27 -1 0 } } { "f:/altera/71/quartus/bin/Assignment Editor.qase" "" { Assignment "f:/altera/71/quartus/bin/Assignment Editor.qase" 1 { { 0 "lightout\[1\]" } } } } { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { lightout[1] } "NODE_NAME" } } { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { lightout[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0}  } {  } 0 0 "Following %1!d! pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" 0 0 "" 0}
{ "Warning" "WFIOMGR_RESERVE_ASSIGNMENT_FOR_UNUSED_PINS_IS_DEFAULT" "As output driving ground " "Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'." {  } {  } 0 0 "The Reserve All Unused Pins setting has not been specified, and will default to '%1!s!'." 0 0 "" 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "D:/f6lift/lift.fit.smsg " "Info: Generated suppressed messages file D:/f6lift/lift.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 6 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "235 " "Info: Allocated 235 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Jun 04 12:45:02 2008 " "Info: Processing ended: Wed Jun 04 12:45:02 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:10 " "Info: Elapsed time: 00:00:10" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}