📄 lift.tan.qmsg
字号:
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "buttonclk " "Info: Assuming node \"buttonclk\" is an undefined clock" { } { { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 7 -1 0 } } { "f:/altera/71/quartus/bin/Assignment Editor.qase" "" { Assignment "f:/altera/71/quartus/bin/Assignment Editor.qase" 1 { { 0 "buttonclk" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "liftclk " "Info: Assuming node \"liftclk\" is an undefined clock" { } { { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 8 -1 0 } } { "f:/altera/71/quartus/bin/Assignment Editor.qase" "" { Assignment "f:/altera/71/quartus/bin/Assignment Editor.qase" 1 { { 0 "liftclk" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0} } { } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT_RESTRICTED" "buttonclk register register fuplight\[5\]~reg0 fuplight\[5\]~reg0 420.17 MHz Internal " "Info: Clock \"buttonclk\" Internal fmax is restricted to 420.17 MHz between source register \"fuplight\[5\]~reg0\" and destination register \"fuplight\[5\]~reg0\"" { { "Info" "ITDB_CLOCK_RATE" "clock 2.38 ns " "Info: fmax restricted to clock pin edge rate 2.38 ns. Expand message to see actual delay path." { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "0.961 ns + Longest register register " "Info: + Longest register to register delay is 0.961 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns fuplight\[5\]~reg0 1 REG LCFF_X63_Y21_N27 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X63_Y21_N27; Fanout = 5; REG Node = 'fuplight\[5\]~reg0'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { fuplight[5]~reg0 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.324 ns) + CELL(0.150 ns) 0.474 ns fuplight~904 2 COMB LCCOMB_X63_Y21_N2 1 " "Info: 2: + IC(0.324 ns) + CELL(0.150 ns) = 0.474 ns; Loc. = LCCOMB_X63_Y21_N2; Fanout = 1; COMB Node = 'fuplight~904'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.474 ns" { fuplight[5]~reg0 fuplight~904 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 21 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.254 ns) + CELL(0.149 ns) 0.877 ns fuplight~905 3 COMB LCCOMB_X63_Y21_N26 1 " "Info: 3: + IC(0.254 ns) + CELL(0.149 ns) = 0.877 ns; Loc. = LCCOMB_X63_Y21_N26; Fanout = 1; COMB Node = 'fuplight~905'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.403 ns" { fuplight~904 fuplight~905 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 21 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.084 ns) 0.961 ns fuplight\[5\]~reg0 4 REG LCFF_X63_Y21_N27 5 " "Info: 4: + IC(0.000 ns) + CELL(0.084 ns) = 0.961 ns; Loc. = LCFF_X63_Y21_N27; Fanout = 5; REG Node = 'fuplight\[5\]~reg0'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.084 ns" { fuplight~905 fuplight[5]~reg0 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.383 ns ( 39.85 % ) " "Info: Total cell delay = 0.383 ns ( 39.85 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.578 ns ( 60.15 % ) " "Info: Total interconnect delay = 0.578 ns ( 60.15 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.961 ns" { fuplight[5]~reg0 fuplight~904 fuplight~905 fuplight[5]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "0.961 ns" { fuplight[5]~reg0 fuplight~904 fuplight~905 fuplight[5]~reg0 } { 0.000ns 0.324ns 0.254ns 0.000ns } { 0.000ns 0.150ns 0.149ns 0.084ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "buttonclk destination 2.680 ns + Shortest register " "Info: + Shortest clock path from clock \"buttonclk\" to destination register is 2.680 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.999 ns) 0.999 ns buttonclk 1 CLK PIN_P1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_P1; Fanout = 1; CLK Node = 'buttonclk'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { buttonclk } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.113 ns) + CELL(0.000 ns) 1.112 ns buttonclk~clkctrl 2 COMB CLKCTRL_G3 21 " "Info: 2: + IC(0.113 ns) + CELL(0.000 ns) = 1.112 ns; Loc. = CLKCTRL_G3; Fanout = 21; COMB Node = 'buttonclk~clkctrl'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.113 ns" { buttonclk buttonclk~clkctrl } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.031 ns) + CELL(0.537 ns) 2.680 ns fuplight\[5\]~reg0 3 REG LCFF_X63_Y21_N27 5 " "Info: 3: + IC(1.031 ns) + CELL(0.537 ns) = 2.680 ns; Loc. = LCFF_X63_Y21_N27; Fanout = 5; REG Node = 'fuplight\[5\]~reg0'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.568 ns" { buttonclk~clkctrl fuplight[5]~reg0 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.536 ns ( 57.31 % ) " "Info: Total cell delay = 1.536 ns ( 57.31 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.144 ns ( 42.69 % ) " "Info: Total interconnect delay = 1.144 ns ( 42.69 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.680 ns" { buttonclk buttonclk~clkctrl fuplight[5]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.680 ns" { buttonclk buttonclk~combout buttonclk~clkctrl fuplight[5]~reg0 } { 0.000ns 0.000ns 0.113ns 1.031ns } { 0.000ns 0.999ns 0.000ns 0.537ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "buttonclk source 2.680 ns - Longest register " "Info: - Longest clock path from clock \"buttonclk\" to source register is 2.680 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.999 ns) 0.999 ns buttonclk 1 CLK PIN_P1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_P1; Fanout = 1; CLK Node = 'buttonclk'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { buttonclk } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.113 ns) + CELL(0.000 ns) 1.112 ns buttonclk~clkctrl 2 COMB CLKCTRL_G3 21 " "Info: 2: + IC(0.113 ns) + CELL(0.000 ns) = 1.112 ns; Loc. = CLKCTRL_G3; Fanout = 21; COMB Node = 'buttonclk~clkctrl'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.113 ns" { buttonclk buttonclk~clkctrl } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.031 ns) + CELL(0.537 ns) 2.680 ns fuplight\[5\]~reg0 3 REG LCFF_X63_Y21_N27 5 " "Info: 3: + IC(1.031 ns) + CELL(0.537 ns) = 2.680 ns; Loc. = LCFF_X63_Y21_N27; Fanout = 5; REG Node = 'fuplight\[5\]~reg0'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.568 ns" { buttonclk~clkctrl fuplight[5]~reg0 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.536 ns ( 57.31 % ) " "Info: Total cell delay = 1.536 ns ( 57.31 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.144 ns ( 42.69 % ) " "Info: Total interconnect delay = 1.144 ns ( 42.69 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.680 ns" { buttonclk buttonclk~clkctrl fuplight[5]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.680 ns" { buttonclk buttonclk~combout buttonclk~clkctrl fuplight[5]~reg0 } { 0.000ns 0.000ns 0.113ns 1.031ns } { 0.000ns 0.999ns 0.000ns 0.537ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.680 ns" { buttonclk buttonclk~clkctrl fuplight[5]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.680 ns" { buttonclk buttonclk~combout buttonclk~clkctrl fuplight[5]~reg0 } { 0.000ns 0.000ns 0.113ns 1.031ns } { 0.000ns 0.999ns 0.000ns 0.537ns } "" } } { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.680 ns" { buttonclk buttonclk~clkctrl fuplight[5]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.680 ns" { buttonclk buttonclk~combout buttonclk~clkctrl fuplight[5]~reg0 } { 0.000ns 0.000ns 0.113ns 1.031ns } { 0.000ns 0.999ns 0.000ns 0.537ns } "" } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.250 ns + " "Info: + Micro clock to output delay of source is 0.250 ns" { } { { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.036 ns + " "Info: + Micro setup delay of destination is -0.036 ns" { } { { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.961 ns" { fuplight[5]~reg0 fuplight~904 fuplight~905 fuplight[5]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "0.961 ns" { fuplight[5]~reg0 fuplight~904 fuplight~905 fuplight[5]~reg0 } { 0.000ns 0.324ns 0.254ns 0.000ns } { 0.000ns 0.150ns 0.149ns 0.084ns } "" } } { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.680 ns" { buttonclk buttonclk~clkctrl fuplight[5]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.680 ns" { buttonclk buttonclk~combout buttonclk~clkctrl fuplight[5]~reg0 } { 0.000ns 0.000ns 0.113ns 1.031ns } { 0.000ns 0.999ns 0.000ns 0.537ns } "" } } { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.680 ns" { buttonclk buttonclk~clkctrl fuplight[5]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.680 ns" { buttonclk buttonclk~combout buttonclk~clkctrl fuplight[5]~reg0 } { 0.000ns 0.000ns 0.113ns 1.031ns } { 0.000ns 0.999ns 0.000ns 0.537ns } "" } } } 0 0 "fmax restricted to %1!s! pin edge rate %2!s!. Expand message to see actual delay path." 0 0 "" 0} } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { fuplight[5]~reg0 } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { fuplight[5]~reg0 } { } { } "" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 319 0 0 } } } 0 0 "Clock \"%1!s!\" %7!s! fmax is restricted to %6!s! between source %2!s! \"%4!s!\" and destination %3!s! \"%5!s!\"" 0 0 "" 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "liftclk register \\ctrlift:pos\[0\] register mylift.doorclose 225.17 MHz 4.441 ns Internal " "Info: Clock \"liftclk\" has Internal fmax of 225.17 MHz between source register \"\\ctrlift:pos\[0\]\" and destination register \"mylift.doorclose\" (period= 4.441 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.227 ns + Longest register register " "Info: + Longest register to register delay is 4.227 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns \\ctrlift:pos\[0\] 1 REG LCFF_X60_Y21_N17 43 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X60_Y21_N17; Fanout = 43; REG Node = '\\ctrlift:pos\[0\]'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { \ctrlift:pos[0] } "NODE_NAME" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.564 ns) + CELL(0.438 ns) 1.002 ns Mux1~125 2 COMB LCCOMB_X59_Y21_N4 2 " "Info: 2: + IC(0.564 ns) + CELL(0.438 ns) = 1.002 ns; Loc. = LCCOMB_X59_Y21_N4; Fanout = 2; COMB Node = 'Mux1~125'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.002 ns" { \ctrlift:pos[0] Mux1~125 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 276 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.698 ns) + CELL(0.438 ns) 2.138 ns Mux4~22 3 COMB LCCOMB_X60_Y21_N12 1 " "Info: 3: + IC(0.698 ns) + CELL(0.438 ns) = 2.138 ns; Loc. = LCCOMB_X60_Y21_N12; Fanout = 1; COMB Node = 'Mux4~22'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.136 ns" { Mux1~125 Mux4~22 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 286 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.247 ns) + CELL(0.150 ns) 2.535 ns Mux4~23 4 COMB LCCOMB_X60_Y21_N30 1 " "Info: 4: + IC(0.247 ns) + CELL(0.150 ns) = 2.535 ns; Loc. = LCCOMB_X60_Y21_N30; Fanout = 1; COMB Node = 'Mux4~23'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.397 ns" { Mux4~22 Mux4~23 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 286 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.247 ns) + CELL(0.150 ns) 2.932 ns mylift~3191 5 COMB LCCOMB_X60_Y21_N10 1 " "Info: 5: + IC(0.247 ns) + CELL(0.150 ns) = 2.932 ns; Loc. = LCCOMB_X60_Y21_N10; Fanout = 1; COMB Node = 'mylift~3191'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.397 ns" { Mux4~23 mylift~3191 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 36 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.248 ns) + CELL(0.149 ns) 3.329 ns mylift~3194 6 COMB LCCOMB_X60_Y21_N28 2 " "Info: 6: + IC(0.248 ns) + CELL(0.149 ns) = 3.329 ns; Loc. = LCCOMB_X60_Y21_N28; Fanout = 2; COMB Node = 'mylift~3194'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.397 ns" { mylift~3191 mylift~3194 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 36 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.256 ns) + CELL(0.150 ns) 3.735 ns Selector8~286 7 COMB LCCOMB_X60_Y21_N0 1 " "Info: 7: + IC(0.256 ns) + CELL(0.150 ns) = 3.735 ns; Loc. = LCCOMB_X60_Y21_N0; Fanout = 1; COMB Node = 'Selector8~286'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.406 ns" { mylift~3194 Selector8~286 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 61 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.259 ns) + CELL(0.149 ns) 4.143 ns Selector8~287 8 COMB LCCOMB_X60_Y21_N24 1 " "Info: 8: + IC(0.259 ns) + CELL(0.149 ns) = 4.143 ns; Loc. = LCCOMB_X60_Y21_N24; Fanout = 1; COMB Node = 'Selector8~287'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.408 ns" { Selector8~286 Selector8~287 } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 61 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.084 ns) 4.227 ns mylift.doorclose 9 REG LCFF_X60_Y21_N25 6 " "Info: 9: + IC(0.000 ns) + CELL(0.084 ns) = 4.227 ns; Loc. = LCFF_X60_Y21_N25; Fanout = 6; REG Node = 'mylift.doorclose'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.084 ns" { Selector8~287 mylift.doorclose } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 36 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.708 ns ( 40.41 % ) " "Info: Total cell delay = 1.708 ns ( 40.41 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.519 ns ( 59.59 % ) " "Info: Total interconnect delay = 2.519 ns ( 59.59 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "4.227 ns" { \ctrlift:pos[0] Mux1~125 Mux4~22 Mux4~23 mylift~3191 mylift~3194 Selector8~286 Selector8~287 mylift.doorclose } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "4.227 ns" { \ctrlift:pos[0] Mux1~125 Mux4~22 Mux4~23 mylift~3191 mylift~3194 Selector8~286 Selector8~287 mylift.doorclose } { 0.000ns 0.564ns 0.698ns 0.247ns 0.247ns 0.248ns 0.256ns 0.259ns 0.000ns } { 0.000ns 0.438ns 0.438ns 0.150ns 0.150ns 0.149ns 0.150ns 0.149ns 0.084ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "liftclk destination 2.650 ns + Shortest register " "Info: + Shortest clock path from clock \"liftclk\" to destination register is 2.650 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.979 ns) 0.979 ns liftclk 1 CLK PIN_D13 1 " "Info: 1: + IC(0.000 ns) + CELL(0.979 ns) = 0.979 ns; Loc. = PIN_D13; Fanout = 1; CLK Node = 'liftclk'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { liftclk } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 8 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.113 ns) + CELL(0.000 ns) 1.092 ns liftclk~clkctrl 2 COMB CLKCTRL_G11 17 " "Info: 2: + IC(0.113 ns) + CELL(0.000 ns) = 1.092 ns; Loc. = CLKCTRL_G11; Fanout = 17; COMB Node = 'liftclk~clkctrl'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.113 ns" { liftclk liftclk~clkctrl } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 8 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.021 ns) + CELL(0.537 ns) 2.650 ns mylift.doorclose 3 REG LCFF_X60_Y21_N25 6 " "Info: 3: + IC(1.021 ns) + CELL(0.537 ns) = 2.650 ns; Loc. = LCFF_X60_Y21_N25; Fanout = 6; REG Node = 'mylift.doorclose'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.558 ns" { liftclk~clkctrl mylift.doorclose } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 36 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.516 ns ( 57.21 % ) " "Info: Total cell delay = 1.516 ns ( 57.21 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.134 ns ( 42.79 % ) " "Info: Total interconnect delay = 1.134 ns ( 42.79 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.650 ns" { liftclk liftclk~clkctrl mylift.doorclose } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.650 ns" { liftclk liftclk~combout liftclk~clkctrl mylift.doorclose } { 0.000ns 0.000ns 0.113ns 1.021ns } { 0.000ns 0.979ns 0.000ns 0.537ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "liftclk source 2.650 ns - Longest register " "Info: - Longest clock path from clock \"liftclk\" to source register is 2.650 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.979 ns) 0.979 ns liftclk 1 CLK PIN_D13 1 " "Info: 1: + IC(0.000 ns) + CELL(0.979 ns) = 0.979 ns; Loc. = PIN_D13; Fanout = 1; CLK Node = 'liftclk'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { liftclk } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 8 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.113 ns) + CELL(0.000 ns) 1.092 ns liftclk~clkctrl 2 COMB CLKCTRL_G11 17 " "Info: 2: + IC(0.113 ns) + CELL(0.000 ns) = 1.092 ns; Loc. = CLKCTRL_G11; Fanout = 17; COMB Node = 'liftclk~clkctrl'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.113 ns" { liftclk liftclk~clkctrl } "NODE_NAME" } } { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 8 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.021 ns) + CELL(0.537 ns) 2.650 ns \\ctrlift:pos\[0\] 3 REG LCFF_X60_Y21_N17 43 " "Info: 3: + IC(1.021 ns) + CELL(0.537 ns) = 2.650 ns; Loc. = LCFF_X60_Y21_N17; Fanout = 43; REG Node = '\\ctrlift:pos\[0\]'" { } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.558 ns" { liftclk~clkctrl \ctrlift:pos[0] } "NODE_NAME" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.516 ns ( 57.21 % ) " "Info: Total cell delay = 1.516 ns ( 57.21 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.134 ns ( 42.79 % ) " "Info: Total interconnect delay = 1.134 ns ( 42.79 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.650 ns" { liftclk liftclk~clkctrl \ctrlift:pos[0] } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.650 ns" { liftclk liftclk~combout liftclk~clkctrl \ctrlift:pos[0] } { 0.000ns 0.000ns 0.113ns 1.021ns } { 0.000ns 0.979ns 0.000ns 0.537ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.650 ns" { liftclk liftclk~clkctrl mylift.doorclose } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.650 ns" { liftclk liftclk~combout liftclk~clkctrl mylift.doorclose } { 0.000ns 0.000ns 0.113ns 1.021ns } { 0.000ns 0.979ns 0.000ns 0.537ns } "" } } { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.650 ns" { liftclk liftclk~clkctrl \ctrlift:pos[0] } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.650 ns" { liftclk liftclk~combout liftclk~clkctrl \ctrlift:pos[0] } { 0.000ns 0.000ns 0.113ns 1.021ns } { 0.000ns 0.979ns 0.000ns 0.537ns } "" } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.250 ns + " "Info: + Micro clock to output delay of source is 0.250 ns" { } { } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.036 ns + " "Info: + Micro setup delay of destination is -0.036 ns" { } { { "lift.vhd" "" { Text "D:/f6lift/lift.vhd" 36 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} } { { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "4.227 ns" { \ctrlift:pos[0] Mux1~125 Mux4~22 Mux4~23 mylift~3191 mylift~3194 Selector8~286 Selector8~287 mylift.doorclose } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "4.227 ns" { \ctrlift:pos[0] Mux1~125 Mux4~22 Mux4~23 mylift~3191 mylift~3194 Selector8~286 Selector8~287 mylift.doorclose } { 0.000ns 0.564ns 0.698ns 0.247ns 0.247ns 0.248ns 0.256ns 0.259ns 0.000ns } { 0.000ns 0.438ns 0.438ns 0.150ns 0.150ns 0.149ns 0.150ns 0.149ns 0.084ns } "" } } { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.650 ns" { liftclk liftclk~clkctrl mylift.doorclose } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.650 ns" { liftclk liftclk~combout liftclk~clkctrl mylift.doorclose } { 0.000ns 0.000ns 0.113ns 1.021ns } { 0.000ns 0.979ns 0.000ns 0.537ns } "" } } { "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.650 ns" { liftclk liftclk~clkctrl \ctrlift:pos[0] } "NODE_NAME" } } { "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/71/quartus/bin/Technology_Viewer.qrui" "2.650 ns" { liftclk liftclk~combout liftclk~clkctrl \ctrlift:pos[0] } { 0.000ns 0.000ns 0.113ns 1.021ns } { 0.000ns 0.979ns 0.000ns 0.537ns } "" } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0}
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