top.map.summary

来自「利用VHDL编写的电子琴发生器」· SUMMARY 代码 · 共 10 行

Analysis & Synthesis Status : Successful - Tue Nov 04 20:21:50 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : TOP
Top-level Entity Name : TOP
Family : ACEX1K
Total logic elements : 119
Total pins : 25
Total memory bits : 0
Total PLLs : 0