top.tan.qmsg

利用VHDL编写的电子琴发生器

{ "Info" "ITDB_TH_RESULT" "Speaker1:u2\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[4\] INDEX1\[5\] CLK12MHZ -2.800 ns register " "Info: th for register \"Speaker1:u2\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[4\]\" (data pin = \"INDEX1\[5\]\", clock pin = \"CLK12MHZ\") is -2.800 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK12MHZ destination 8.400 ns + Longest register " "Info: + Longest clock path from clock \"CLK12MHZ\" to destination register is 8.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK12MHZ 1 CLK PIN_79 5 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_79; Fanout = 5; CLK Node = 'CLK12MHZ'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK12MHZ } "NODE_NAME" } } { "TOP.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TOP.VHD" 4 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns Speaker1:u2\|lpm_counter:\\DivideCLK:Count4\[0\]_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[2\] 2 REG LC7_E3 4 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC7_E3; Fanout = 4; REG Node = 'Speaker1:u2\|lpm_counter:\\DivideCLK:Count4\[0\]_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[2\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.900 ns" { CLK12MHZ Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[2] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.600 ns) 4.800 ns Speaker1:u2\|LessThan0~23 3 COMB LC1_E3 19 " "Info: 3: + IC(0.300 ns) + CELL(1.600 ns) = 4.800 ns; Loc. = LC1_E3; Fanout = 19; COMB Node = 'Speaker1:u2\|LessThan0~23'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.900 ns" { Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[2] Speaker1:u2|LessThan0~23 } "NODE_NAME" } } { "speaker1.vhd" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/speaker1.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.600 ns) + CELL(0.000 ns) 8.400 ns Speaker1:u2\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[4\] 4 REG LC8_A34 3 " "Info: 4: + IC(3.600 ns) + CELL(0.0