top.tan.qmsg

利用VHDL编写的电子琴发生器

{ "Info" "ITDB_TSU_RESULT" "Speaker1:u2\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[9\] INDEX1\[3\] CLK12MHZ 14.300 ns register " "Info: tsu for register \"Speaker1:u2\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[9\]\" (data pin = \"INDEX1\[3\]\", clock pin = \"CLK12MHZ\") is 14.300 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "21.900 ns + Longest pin register " "Info: + Longest pin to register delay is 21.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.900 ns) 4.900 ns INDEX1\[3\] 1 PIN PIN_71 29 " "Info: 1: + IC(0.000 ns) + CELL(4.900 ns) = 4.900 ns; Loc. = PIN_71; Fanout = 29; PIN Node = 'INDEX1\[3\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { INDEX1[3] } "NODE_NAME" } } { "TOP.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TOP.VHD" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.000 ns) + CELL(1.700 ns) 9.600 ns Tone:u1\|Mux1~71 2 COMB LC6_A17 1 " "Info: 2: + IC(3.000 ns) + CELL(1.700 ns) = 9.600 ns; Loc. = LC6_A17; Fanout = 1; COMB Node = 'Tone:u1\|Mux1~71'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.700 ns" { INDEX1[3] Tone:u1|Mux1~71 } "NODE_NAME" } } { "TONE.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TONE.VHD" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.700 ns) 11.600 ns Tone:u1\|Mux1~72 3 COMB LC2_A17 1 " "Info: 3: + IC(0.300 ns) + CELL(1.700 ns) = 11.600 ns; Loc. = LC2_A17; Fanout = 1; COMB Node = 'Tone:u1\|Mux1~72'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.000 ns" { Tone:u1|Mux1~71 Tone:u1|Mux1~72 } "NODE_NAME" } } { "TONE.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TONE.VHD" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.800 ns) + CELL(1.400 ns) 14.800 ns Tone:u1\|Mux1~73 4 COMB LC6_A25 2 " "Info: 4: + IC(1.800 ns) + CELL(1.400 ns) = 14.800 ns; Loc. = LC6_A25; Fanout = 2; COMB Node = 'Tone:u1\|Mux1~73'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.200 ns" { Tone:u1|Mux1~72 Tone:u1|Mux1~73 } "NODE_NAME" } } { "TONE.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TONE.VHD" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.100 ns) 16.200 ns Tone:u1\|Tone\[9\]~1770 5 COMB LC3_A25 1 " "Info: 5: + IC(0.300 ns) + CELL(1.100 ns) = 16.200 ns; Loc. = LC3_A25; Fanout = 1; COMB Node = 'Tone:u1\|Tone\[9\]~1770'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.400 ns" { Tone:u1|Mux1~73 Tone:u1|Tone[9]~1770 } "NODE_NAME" } } { "TONE.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TONE.VHD" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.600 ns) 17.800 ns Tone:u1\|Tone\[9\]~1734 6 COMB LC4_A25 1 " "Info: 6: + IC(0.000 ns) + CELL(1.600 ns) = 17.800 ns; Loc. = LC4_A25; Fanout = 1; COMB Node = 'Tone:u1\|Tone\[9\]~1734'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.600 ns" { Tone:u1|Tone[9]~1770 Tone:u1|Tone[9]~1734 } "NODE_NAME" } } { "TONE.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TONE.VHD" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 19.500 ns Tone:u1\|Tone\[9\]~1734\$wirecell 7 COMB LC2_A25 2 " "Info: 7: + IC(0.300 ns) + CELL(1.400 ns) = 19.500 ns; Loc. = LC2_A25; Fanout = 2; COMB Node = 'Tone:u1\|Tone\[9\]~1734\$wirecell'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.700 ns" { Tone:u1|Tone[9]~1734 Tone:u1|Tone[9]~1734$wirecell } "NODE_NAME" } } { "TONE.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TONE.VHD" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(1.000 ns) 21.900 ns Speaker1:u2\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[9\] 8 REG LC5_A36 4 " "Info: 8: + IC(1.400 ns) + CELL(1.000 ns) = 21.900 ns; Loc. = LC5_A36; Fanout = 4; REG Node = 'Speaker1:u2\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[9\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { Tone:u1|Tone[9]~1734$wirecell Speaker1:u2|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[9] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "14.800 ns ( 67.58 % ) " "Info: Total cell delay = 14.800 ns ( 67.58 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.100 ns ( 32.42 % ) " "Info: Total interconnect delay = 7.100 ns ( 32.42 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "21.900 ns" { INDEX1[3] Tone:u1|Mux1~71 Tone:u1|Mux1~72 Tone:u1|Mux1~73 Tone:u1|Tone[9]~1770 Tone:u1|Tone[9]~1734 Tone:u1|Tone[9]~1734$wirecell Speaker1:u2|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[9] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "21.900 ns" { INDEX1[3] INDEX1[3]~out Tone:u1|Mux1~71 Tone:u1|Mux1~72 Tone:u1|Mux1~73 Tone:u1|Tone[9]~1770 Tone:u1|Tone[9]~1734 Tone:u1|Tone[9]~1734$wirecell Speaker1:u2|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[9] } { 0.000ns 0.000ns 3.000ns 0.300ns 1.800ns 0.300ns 0.000ns 0.300ns 1.400ns } { 0.000ns 4.900ns 1.700ns 1.700ns 1.400ns 1.100ns 1.600ns 1.400ns 1.000ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" {  } { { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK12MHZ destination 8.200 ns - Shortest register " "Info: - Shortest clock path from clock \"CLK12MHZ\" to destination register is 8.200 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK12MHZ 1 CLK PIN_79 5 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_79; Fanout = 5; CLK Node = 'CLK12MHZ'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK12MHZ } "NODE_NAME" } } { "TOP.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TOP.VHD" 4 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns Speaker1:u2\|lpm_counter:\\DivideCLK:Count4\[0\]_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] 2 REG LC8_E3 2 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC8_E3; Fanout = 2; REG Node = 'Speaker1:u2\|lpm_counter:\\DivideCLK:Count4\[0\]_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.900 ns" { CLK12MHZ Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 4.600 ns Speaker1:u2\|LessThan0~23 3 COMB LC1_E3 19 " "Info: 3: + IC(0.300 ns) + CELL(1.400 ns) = 4.600 ns; Loc. = LC1_E3; Fanout = 19; COMB Node = 'Speaker1:u2\|LessThan0~23'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.700 ns" { Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[3] Speaker1:u2|LessThan0~23 } "NODE_NAME" } } { "speaker1.vhd" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/speaker1.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.600 ns) + CELL(0.000 ns) 8.200 ns Speaker1:u2\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[9\] 4 REG LC5_A36 4 " "Info: 4: + IC(3.600 ns) + CELL(0.000 ns) = 8.200 ns; Loc. = LC5_A36; Fanout = 4; REG Node = 'Speaker1:u2\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[9\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.600 ns" { Speaker1:u2|LessThan0~23 Speaker1:u2|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[9] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.900 ns ( 47.56 % ) " "Info: Total cell delay = 3.900 ns ( 47.56 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.300 ns ( 52.44 % ) " "Info: Total interconnect delay = 4.300 ns ( 52.44 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.200 ns" { CLK12MHZ Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[3] Speaker1:u2|LessThan0~23 Speaker1:u2|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[9] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "8.200 ns" { CLK12MHZ CLK12MHZ~out Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[3] Speaker1:u2|LessThan0~23 Speaker1:u2|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[9] } { 0.000ns 0.000ns 0.400ns 0.300ns 3.600ns } { 0.000ns 2.000ns 0.500ns 1.400ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "21.900 ns" { INDEX1[3] Tone:u1|Mux1~71 Tone:u1|Mux1~72 Tone:u1|Mux1~73 Tone:u1|Tone[9]~1770 Tone:u1|Tone[9]~1734 Tone:u1|Tone[9]~1734$wirecell Speaker1:u2|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[9] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "21.900 ns" { INDEX1[3] INDEX1[3]~out Tone:u1|Mux1~71 Tone:u1|Mux1~72 Tone:u1|Mux1~73 Tone:u1|Tone[9]~1770 Tone:u1|Tone[9]~1734 Tone:u1|Tone[9]~1734$wirecell Speaker1:u2|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[9] } { 0.000ns 0.000ns 3.000ns 0.300ns 1.800ns 0.300ns 0.000ns 0.300ns 1.400ns } { 0.000ns 4.900ns 1.700ns 1.700ns 1.400ns 1.100ns 1.600ns 1.400ns 1.000ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.200 ns" { CLK12MHZ Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[3] Speaker1:u2|LessThan0~23 Speaker1:u2|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[9] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "8.200 ns" { CLK12MHZ CLK12MHZ~out Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[3] Speaker1:u2|LessThan0~23 Speaker1:u2|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[9] } { 0.000ns 0.000ns 0.400ns 0.300ns 3.600ns } { 0.000ns 2.000ns 0.500ns 1.400ns 0.000ns } } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "CLK12MHZ SPKOUT Speaker1:u2\|SpkS 18.200 ns register " "Info: tco from clock \"CLK12MHZ\" to destination pin \"SPKOUT\" through register \"Speaker1:u2\|SpkS\" is 18.200 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK12MHZ source 9.200 ns + Longest register " "Info: + Longest clock path from clock \"CLK12MHZ\" to source register is 9.200 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK12MHZ 1 CLK PIN_79 5 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_79; Fanout = 5; CLK Node = 'CLK12MHZ'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK12MHZ } "NODE_NAME" } } { "TOP.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TOP.VHD" 4 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns Speaker1:u2\|lpm_counter:\\DivideCLK:Count4\[0\]_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[2\] 2 REG LC7_E3 4 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC7_E3; Fanout = 4; REG Node = 'Speaker1:u2\|lpm_counter:\\DivideCLK:Count4\[0\]_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[2\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.900 ns" { CLK12MHZ Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[2] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.600 ns) 4.800 ns Speaker1:u2\|LessThan0~23 3 COMB LC1_E3 19 " "Info: 3: + IC(0.300 ns) + CELL(1.600 ns) = 4.800 ns; Loc. = LC1_E3; Fanout = 19; COMB Node = 'Speaker1:u2\|LessThan0~23'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.900 ns" { Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[2] Speaker1:u2|LessThan0~23 } "NODE_NAME" } } { "speaker1.vhd" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/speaker1.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.600 ns) + CELL(0.500 ns) 8.900 ns Speaker1:u2\|FullSpkS 4 REG LC1_A30 1 " "Info: 4: + IC(3.600 ns) + CELL(0.500 ns) = 8.900 ns; Loc. = LC1_A30; Fanout = 1; REG Node = 'Speaker1:u2\|FullSpkS'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.100 ns" { Speaker1:u2|LessThan0~23 Speaker1:u2|FullSpkS } "NODE_NAME" } } { "speaker1.vhd" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/speaker1.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(0.000 ns) 9.200 ns Speaker1:u2\|SpkS 5 REG LC4_A30 2 " "Info: 5: + IC(0.300 ns) + CELL(0.000 ns) = 9.200 ns; Loc. = LC4_A30; Fanout = 2; REG Node = 'Speaker1:u2\|SpkS'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.300 ns" { Speaker1:u2|FullSpkS Speaker1:u2|SpkS } "NODE_NAME" } } { "speaker1.vhd" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/speaker1.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.600 ns ( 50.00 % ) " "Info: Total cell delay = 4.600 ns ( 50.00 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.600 ns ( 50.00 % ) " "Info: Total interconnect delay = 4.600 ns ( 50.00 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "9.200 ns" { CLK12MHZ Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[2] Speaker1:u2|LessThan0~23 Speaker1:u2|FullSpkS Speaker1:u2|SpkS } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "9.200 ns" { CLK12MHZ CLK12MHZ~out Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[2] Speaker1:u2|LessThan0~23 Speaker1:u2|FullSpkS Speaker1:u2|SpkS } { 0.000ns 0.000ns 0.400ns 0.300ns 3.600ns 0.300ns } { 0.000ns 2.000ns 0.500ns 1.600ns 0.500ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns + " "Info: + Micro clock to output delay of source is 0.500 ns" {  } { { "speaker1.vhd" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/speaker1.vhd" 6 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.500 ns + Longest register pin " "Info: + Longest register to pin delay is 8.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns Speaker1:u2\|SpkS 1 REG LC4_A30 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC4_A30; Fanout = 2; REG Node = 'Speaker1:u2\|SpkS'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { Speaker1:u2|SpkS } "NODE_NAME" } } { "speaker1.vhd" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/speaker1.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.200 ns) + CELL(6.300 ns) 8.500 ns SPKOUT 2 PIN PIN_38 0 " "Info: 2: + IC(2.200 ns) + CELL(6.300 ns) = 8.500 ns; Loc. = PIN_38; Fanout = 0; PIN Node = 'SPKOUT'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.500 ns" { Speaker1:u2|SpkS SPKOUT } "NODE_NAME" } } { "TOP.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TOP.VHD" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.300 ns ( 74.12 % ) " "Info: Total cell delay = 6.300 ns ( 74.12 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.200 ns ( 25.88 % ) " "Info: Total interconnect delay = 2.200 ns ( 25.88 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.500 ns" { Speaker1:u2|SpkS SPKOUT } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "8.500 ns" { Speaker1:u2|SpkS SPKOUT } { 0.000ns 2.200ns } { 0.000ns 6.300ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "9.200 ns" { CLK12MHZ Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[2] Speaker1:u2|LessThan0~23 Speaker1:u2|FullSpkS Speaker1:u2|SpkS } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "9.200 ns" { CLK12MHZ CLK12MHZ~out Speaker1:u2|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[2] Speaker1:u2|LessThan0~23 Speaker1:u2|FullSpkS Speaker1:u2|SpkS } { 0.000ns 0.000ns 0.400ns 0.300ns 3.600ns 0.300ns } { 0.000ns 2.000ns 0.500ns 1.600ns 0.500ns 0.000ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.500 ns" { Speaker1:u2|SpkS SPKOUT } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "8.500 ns" { Speaker1:u2|SpkS SPKOUT } { 0.000ns 2.200ns } { 0.000ns 6.300ns } } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "INDEX1\[5\] CODE1\[1\] 20.100 ns Longest " "Info: Longest tpd from source pin \"INDEX1\[5\]\" to destination pin \"CODE1\[1\]\" is 20.100 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.900 ns) 4.900 ns INDEX1\[5\] 1 PIN PIN_74 34 " "Info: 1: + IC(0.000 ns) + CELL(4.900 ns) = 4.900 ns; Loc. = PIN_74; Fanout = 34; PIN Node = 'INDEX1\[5\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { INDEX1[5] } "NODE_NAME" } } { "TOP.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TOP.VHD" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.400 ns) + CELL(1.700 ns) 9.000 ns Tone:u1\|Mux30~37 2 COMB LC2_A35 1 " "Info: 2: + IC(2.400 ns) + CELL(1.700 ns) = 9.000 ns; Loc. = LC2_A35; Fanout = 1; COMB Node = 'Tone:u1\|Mux30~37'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.100 ns" { INDEX1[5] Tone:u1|Mux30~37 } "NODE_NAME" } } { "TONE.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TONE.VHD" 58 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 10.700 ns Tone:u1\|Mux30~38 3 COMB LC1_A35 1 " "Info: 3: + IC(0.300 ns) + CELL(1.400 ns) = 10.700 ns; Loc. = LC1_A35; Fanout = 1; COMB Node = 'Tone:u1\|Mux30~38'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.700 ns" { Tone:u1|Mux30~37 Tone:u1|Mux30~38 } "NODE_NAME" } } { "TONE.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TONE.VHD" 58 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.100 ns) + CELL(6.300 ns) 20.100 ns CODE1\[1\] 4 PIN PIN_128 0 " "Info: 4: + IC(3.100 ns) + CELL(6.300 ns) = 20.100 ns; Loc. = PIN_128; Fanout = 0; PIN Node = 'CODE1\[1\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "9.400 ns" { Tone:u1|Mux30~38 CODE1[1] } "NODE_NAME" } } { "TOP.VHD" "" { Text "O:/期末考试提供资料/电子琴设计部分提供资料/电子琴乐器演奏电路(电子琴)/TOP.VHD" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "14.300 ns ( 71.14 % ) " "Info: Total cell delay = 14.300 ns ( 71.14 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.800 ns ( 28.86 % ) " "Info: Total interconnect delay = 5.800 ns ( 28.86 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "20.100 ns" { INDEX1[5] Tone:u1|Mux30~37 Tone:u1|Mux30~38 CODE1[1] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "20.100 ns" { INDEX1[5] INDEX1[5]~out Tone:u1|Mux30~37 Tone:u1|Mux30~38 CODE1[1] } { 0.000ns 0.000ns 2.400ns 0.300ns 3.100ns } { 0.000ns 4.900ns 1.700ns 1.400ns 6.300ns } } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}