mux21a.tan.qmsg

利用VHDL编写的电子琴发生器

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLK12MHZ2 register Songer:u2\|lpm_counter:count8Hz_rtl_5\|alt_counter_f10ke:wysi_counter\|q\[6\] register Songer:u2\|CLK8HZ 69.44 MHz 14.4 ns Internal " "Info: Clock \"CLK12MHZ2\" has Internal fmax of 69.44 MHz between source register \"Songer:u2\|lpm_counter:count8Hz_rtl_5\|alt_counter_f10ke:wysi_counter\|q\[6\]\" and destination register \"Songer:u2\|CLK8HZ\" (period= 14.4 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "13.300 ns + Longest register register " "Info: + Longest register to register delay is 13.300 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns Songer:u2\|lpm_counter:count8Hz_rtl_5\|alt_counter_f10ke:wysi_counter\|q\[6\] 1 REG LC1_B33 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1_B33; Fanout = 3; REG Node = 'Songer:u2\|lpm_counter:count8Hz_rtl_5\|alt_counter_f10ke:wysi_counter\|q\[6\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(1.600 ns) 2.600 ns Songer:u2\|LessThan0~242 2 COMB LC1_B32 1 " "Info: 2: + IC(1.000 ns) + CELL(1.600 ns) = 2.600 ns; Loc. = LC1_B32; Fanout = 1; COMB Node = 'Songer:u2\|LessThan0~242'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.600 ns" { Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] Songer:u2|LessThan0~242 } "NODE_NAME" } } { "Songer.vhd" "" { Text "L:/小伟的VHD/others/整合/Songer.vhd" 38 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(1.400 ns) 5.000 ns Songer:u2\|LessThan0~243 3 COMB LC4_B36 1 " "Info: 3: + IC(1.000 ns) + CELL(1.400 ns) = 5.000 ns; Loc. = LC4_B36; Fanout = 1; COMB Node = 'Songer:u2\|LessThan0~243'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { Songer:u2|LessThan0~242 Songer:u2|LessThan0~243 } "NODE_NAME" } } { "Songer.vhd" "" { Text "L:/小伟的VHD/others/整合/Songer.vhd" 38 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 6.700 ns Songer:u2\|LessThan0~244 4 COMB LC5_B36 1 " "Info: 4: + IC(0.300 ns) + CELL(1.400 ns) = 6.700 ns; Loc. = LC5_B36; Fanout = 1; COMB Node = 'Songer:u2\|LessThan0~244'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.700 ns" { Songer:u2|LessThan0~243 Songer:u2|LessThan0~244 } "NODE_NAME" } } { "Songer.vhd" "" { Text "L:/小伟的VHD/others/整合/Songer.vhd" 38 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 8.400 ns Songer:u2\|LessThan0~245 5 COMB LC6_B36 1 " "Info: 5: + IC(0.300 ns) + CELL(1.400 ns) = 8.400 ns; Loc. = LC6_B36; Fanout = 1; COMB Node = 'Songer:u2\|LessThan0~245'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.700 ns" { Songer:u2|LessThan0~244 Songer:u2|LessThan0~245 } "NODE_NAME" } } { "Songer.vhd" "" { Text "L:/小伟的VHD/others/整合/Songer.vhd" 38 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.600 ns) 10.300 ns Songer:u2\|LessThan0~246 6 COMB LC1_B36 23 " "Info: 6: + IC(0.300 ns) + CELL(1.600 ns) = 10.300 ns; Loc. = LC1_B36; Fanout = 23; COMB Node = 'Songer:u2\|LessThan0~246'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.900 ns" { Songer:u2|LessThan0~245 Songer:u2|LessThan0~246 } "NODE_NAME" } } { "Songer.vhd" "" { Text "L:/小伟的VHD/others/整合/Songer.vhd" 38 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 12.000 ns Songer:u2\|CLK8HZ~1 7 COMB LC7_B36 1 " "Info: 7: + IC(0.300 ns) + CELL(1.400 ns) = 12.000 ns; Loc. = LC7_B36; Fanout = 1; COMB Node = 'Songer:u2\|CLK8HZ~1'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.700 ns" { Songer:u2|LessThan0~246 Songer:u2|CLK8HZ~1 } "NODE_NAME" } } { "Songer.vhd" "" { Text "L:/小伟的VHD/others/整合/Songer.vhd" 28 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.000 ns) 13.300 ns Songer:u2\|CLK8HZ 8 REG LC3_B36 48 " "Info: 8: + IC(0.300 ns) + CELL(1.000 ns) = 13.300 ns; Loc. = LC3_B36; Fanout = 48; REG Node = 'Songer:u2\|CLK8HZ'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.300 ns" { Songer:u2|CLK8HZ~1 Songer:u2|CLK8HZ } "NODE_NAME" } } { "Songer.vhd" "" { Text "L:/小伟的VHD/others/整合/Songer.vhd" 28 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "9.800 ns ( 73.68 % ) " "Info: Total cell delay = 9.800 ns ( 73.68 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.500 ns ( 26.32 % ) " "Info: Total interconnect delay = 3.500 ns ( 26.32 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "13.300 ns" { Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] Songer:u2|LessThan0~242 Songer:u2|LessThan0~243 Songer:u2|LessThan0~244 Songer:u2|LessThan0~245 Songer:u2|LessThan0~246 Songer:u2|CLK8HZ~1 Songer:u2|CLK8HZ } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "13.300 ns" { Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] Songer:u2|LessThan0~242 Songer:u2|LessThan0~243 Songer:u2|LessThan0~244 Songer:u2|LessThan0~245 Songer:u2|LessThan0~246 Songer:u2|CLK8HZ~1 Songer:u2|CLK8HZ } { 0.000ns 1.000ns 1.000ns 0.300ns 0.300ns 0.300ns 0.300ns 0.300ns } { 0.000ns 1.600ns 1.400ns 1.400ns 1.400ns 1.600ns 1.400ns 1.000ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK12MHZ2 destination 2.400 ns + Shortest register " "Info: + Shortest clock path from clock \"CLK12MHZ2\" to destination register is 2.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK12MHZ2 1 CLK PIN_79 33 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_79; Fanout = 33; CLK Node = 'CLK12MHZ2'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK12MHZ2 } "NODE_NAME" } } { "mux21a.vhd" "" { Text "L:/小伟的VHD/others/整合/mux21a.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.000 ns) 2.400 ns Songer:u2\|CLK8HZ 2 REG LC3_B36 48 " "Info: 2: + IC(0.400 ns) + CELL(0.000 ns) = 2.400 ns; Loc. = LC3_B36; Fanout = 48; REG Node = 'Songer:u2\|CLK8HZ'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.400 ns" { CLK12MHZ2 Songer:u2|CLK8HZ } "NODE_NAME" } } { "Songer.vhd" "" { Text "L:/小伟的VHD/others/整合/Songer.vhd" 28 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.000 ns ( 83.33 % ) " "Info: Total cell delay = 2.000 ns ( 83.33 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.400 ns ( 16.67 % ) " "Info: Total interconnect delay = 0.400 ns ( 16.67 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK12MHZ2 Songer:u2|CLK8HZ } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK12MHZ2 CLK12MHZ2~out Songer:u2|CLK8HZ } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK12MHZ2 source 2.400 ns - Longest register " "Info: - Longest clock path from clock \"CLK12MHZ2\" to source register is 2.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK12MHZ2 1 CLK PIN_79 33 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_79; Fanout = 33; CLK Node = 'CLK12MHZ2'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK12MHZ2 } "NODE_NAME" } } { "mux21a.vhd" "" { Text "L:/小伟的VHD/others/整合/mux21a.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.000 ns) 2.400 ns Songer:u2\|lpm_counter:count8Hz_rtl_5\|alt_counter_f10ke:wysi_counter\|q\[6\] 2 REG LC1_B33 3 " "Info: 2: + IC(0.400 ns) + CELL(0.000 ns) = 2.400 ns; Loc. = LC1_B33; Fanout = 3; REG Node = 'Songer:u2\|lpm_counter:count8Hz_rtl_5\|alt_counter_f10ke:wysi_counter\|q\[6\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.400 ns" { CLK12MHZ2 Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.000 ns ( 83.33 % ) " "Info: Total cell delay = 2.000 ns ( 83.33 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.400 ns ( 16.67 % ) " "Info: Total interconnect delay = 0.400 ns ( 16.67 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK12MHZ2 Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK12MHZ2 CLK12MHZ2~out Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK12MHZ2 Songer:u2|CLK8HZ } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK12MHZ2 CLK12MHZ2~out Songer:u2|CLK8HZ } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK12MHZ2 Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK12MHZ2 CLK12MHZ2~out Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns + " "Info: + Micro clock to output delay of source is 0.500 ns" {  } { { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" {  } { { "Songer.vhd" "" { Text "L:/小伟的VHD/others/整合/Songer.vhd" 28 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "13.300 ns" { Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] Songer:u2|LessThan0~242 Songer:u2|LessThan0~243 Songer:u2|LessThan0~244 Songer:u2|LessThan0~245 Songer:u2|LessThan0~246 Songer:u2|CLK8HZ~1 Songer:u2|CLK8HZ } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "13.300 ns" { Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] Songer:u2|LessThan0~242 Songer:u2|LessThan0~243 Songer:u2|LessThan0~244 Songer:u2|LessThan0~245 Songer:u2|LessThan0~246 Songer:u2|CLK8HZ~1 Songer:u2|CLK8HZ } { 0.000ns 1.000ns 1.000ns 0.300ns 0.300ns 0.300ns 0.300ns 0.300ns } { 0.000ns 1.600ns 1.400ns 1.400ns 1.400ns 1.600ns 1.400ns 1.000ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK12MHZ2 Songer:u2|CLK8HZ } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK12MHZ2 CLK12MHZ2~out Songer:u2|CLK8HZ } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK12MHZ2 Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK12MHZ2 CLK12MHZ2~out Songer:u2|lpm_counter:count8Hz_rtl_5|alt_counter_f10ke:wysi_counter|q[6] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Warning" "WTAN_CLOCK_WILL_NOT_OPERATE" "CLK12MHZ2 201 " "Warning: Circuit may not operate. Detected 201 non-operational path(s) clocked by clock \"CLK12MHZ2\" with clock skew larger than data delay. See Compilation Report for details." {  } {  } 0 0 "Circuit may not operate. Detected %2!d! non-operational path(s) clocked by clock \"%1!s!\" with clock skew larger than data delay. See Compilation Report for details." 0 0}
{ "Info" "ITDB_FULL_NEGATIVE_HOLD_RESULT" "Songer:u2\|NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[3\]~reg_ra0 Songer:u2\|ToneTaba:u2\|HIGH CLK12MHZ2 2.2 ns " "Info: Found hold time violation between source  pin or register \"Songer:u2\|NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[3\]~reg_ra0\" and destination pin or register \"Songer:u2\|ToneTaba:u2\|HIGH\" for clock \"CLK12MHZ2\" (Hold time is 2.2 ns)" { { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "11.700 ns + Largest " "Info: + Largest clock skew is 11.700 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK12MHZ2 destination 17.800 ns + Longest register " "Info: + Longest clock path from clock \"CLK12MHZ2\" to destination register is 17.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK12MHZ2 1 CLK PIN_79 33 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_79; Fanout = 33; CLK Node = 'CLK12MHZ2'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK12MHZ2 } "NODE_NAME" } } { "mux21a.vhd" "" { Text "L:/小伟的VHD/others/整合/mux21a.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns Songer:u2\|CLK8HZ 2 REG LC3_B36 48 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC3_B36; Fanout = 48; REG Node = 'Songer:u2\|CLK8HZ'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.900 ns" { CLK12MHZ2 Songer:u2|CLK8HZ } "NODE_NAME" } } { "Songer.vhd" "" { Text "L:/小伟的VHD/others/整合/Songer.vhd" 28 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.200 ns) + CELL(0.400 ns) 6.500 ns Songer:u2\|NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[3\]~reg_ra7 3 MEM EC1_F 1 " "Info: 3: + IC(3.200 ns) + CELL(0.400 ns) = 6.500 ns; Loc. = EC1_F; Fanout = 1; MEM Node = 'Songer:u2\|NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[3\]~reg_ra7'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.600 ns" { Songer:u2|CLK8HZ Songer:u2|NoteTabs:u1|music:u1|lpm_rom:lpm_rom_component|altrom:srom|q[3]~reg_ra7 } "NODE_NAME" } } { "altrom.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/altrom.tdf" 80 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.400 ns) 10.900 ns Songer:u2\|NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[3\]~mem_cell_ra0 4 MEM EC1_F 1 " "Info: 4: + IC(0.000 ns) + CELL(4.400 ns) = 10.900 ns; Loc. = EC1_F; Fanout = 1; MEM Node = 'Songer:u2\|NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[3\]~mem_cell_ra0'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.400 ns" { Songer:u2|NoteTabs:u1|music:u1|lpm_rom:lpm_rom_component|altrom:srom|q[3]~reg_ra7 Songer:u2|NoteTabs:u1|music:u1|lpm_rom:lpm_rom_component|altrom:srom|q[3]~mem_cell_ra0 } "NODE_NAME" } } { "altrom.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/altrom.tdf" 80 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.400 ns) 12.300 ns Songer:u2\|NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[3\] 5 MEM EC1_F 16 " "Info: 5: + IC(0.000 ns) + CELL(1.400 ns) = 12.300 ns; Loc. = EC1_F; Fanout = 16; MEM Node = 'Songer:u2\|NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[3\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.400 ns" { Songer:u2|NoteTabs:u1|music:u1|lpm_rom:lpm_rom_component|altrom:srom|q[3]~mem_cell_ra0 Songer:u2|NoteTabs:u1|music:u1|lpm_rom:lpm_rom_component|altrom:srom|q[3] } "NODE_NAME" } } { "altrom.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/altrom.tdf" 80 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.900 ns) + CELL(1.700 ns) 15.900 ns Songer:u2\|ToneTaba:u2\|Mux4~3 6 COMB LC4_E6 15 " "Info: 6: + IC(1.900 ns) + CELL(1.700 ns) = 15.900 ns; Loc. = LC4_E6; Fanout = 15; COMB Node = 'Songer:u2\|ToneTaba:u2\|Mux4~3'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.600 ns" { Songer:u2|NoteTabs:u1|music:u1|lpm_r