mux21a.hier_info

利用VHDL编写的电子琴发生器

Index[7] => Mux7.IN256
Index[7] => Mux8.IN256
Index[7] => Mux9.IN256
Index[7] => Mux10.IN256
Index[7] => Mux11.IN256
Index[7] => Mux12.IN256
Index[7] => Mux13.IN256
Index[7] => Mux14.IN256
Index[7] => Mux15.IN256
Index[7] => Mux16.IN256
Index[7] => Mux17.IN256
Index[7] => Mux18.IN256
Index[7] => Mux19.IN256
Index[7] => Mux20.IN256
Index[7] => Mux21.IN256
Index[7] => Mux22.IN256
Index[7] => Mux23.IN256
Index[7] => Mux24.IN256
Index[7] => Mux25.IN256
Index[7] => Mux26.IN256
Index[7] => Mux27.IN256
Index[7] => Mux28.IN256
Index[7] => Mux29.IN256
Index[7] => Mux30.IN256
Index[7] => Mux31.IN256
Index[7] => Mux32.IN256
Index[7] => Mux33.IN256
Index[7] => Mux34.IN256
Index[7] => Mux35.IN256
Index[7] => Mux36.IN256
Index[7] => Mux37.IN256
Index[7] => Mux38.IN256
HORL => KLK[0].CLK
HORL => KLK[1].CLK
CODE[0] <= Mux38.DB_MAX_OUTPUT_PORT_TYPE
CODE[1] <= Mux37.DB_MAX_OUTPUT_PORT_TYPE
CODE[2] <= Mux36.DB_MAX_OUTPUT_PORT_TYPE
CODE[3] <= Mux35.DB_MAX_OUTPUT_PORT_TYPE
NUME[0] <= KLK[0].DB_MAX_OUTPUT_PORT_TYPE
NUME[1] <= KLK[1].DB_MAX_OUTPUT_PORT_TYPE
NUME[2] <= <GND>
NUME[3] <= <GND>
HIGH <= Equal0.DB_MAX_OUTPUT_PORT_TYPE
Tone[0] <= Tone~32.DB_MAX_OUTPUT_PORT_TYPE
Tone[1] <= Tone~31.DB_MAX_OUTPUT_PORT_TYPE
Tone[2] <= Tone~30.DB_MAX_OUTPUT_PORT_TYPE
Tone[3] <= Tone~29.DB_MAX_OUTPUT_PORT_TYPE
Tone[4] <= Tone~28.DB_MAX_OUTPUT_PORT_TYPE
Tone[5] <= Tone~27.DB_MAX_OUTPUT_PORT_TYPE
Tone[6] <= Tone~26.DB_MAX_OUTPUT_PORT_TYPE
Tone[7] <= Tone~25.DB_MAX_OUTPUT_PORT_TYPE
Tone[8] <= Tone~24.DB_MAX_OUTPUT_PORT_TYPE
Tone[9] <= Tone~23.DB_MAX_OUTPUT_PORT_TYPE
Tone[10] <= Tone~22.DB_MAX_OUTPUT_PORT_TYPE


|mux21a|TOP:u1|Speaker1:u2
clk1 => \DivideCLK:Count4[0].CLK
clk1 => \DivideCLK:Count4[1].CLK
clk1 => \DivideCLK:Count4[2].CLK
clk1 => \DivideCLK:Count4[3].CLK
Tone1[0] => Count11~10.DATAB
Tone1[1] => Count11~9.DATAB
Tone1[2] => Count11~8.DATAB
Tone1[3] => Count11~7.DATAB
Tone1[4] => Count11~6.DATAB
Tone1[5] => Count11~5.DATAB
Tone1[6] => Count11~4.DATAB
Tone1[7] => Count11~3.DATAB
Tone1[8] => Count11~2.DATAB
Tone1[9] => Count11~1.DATAB
Tone1[10] => Count11~0.DATAB
SpkS <= SpkS~reg0.DB_MAX_OUTPUT_PORT_TYPE


|mux21a|Songer:u2
CLK12MHZ => Speakera:u3.clk
CLK12MHZ => CLK8HZ.CLK
CLK12MHZ => count8Hz[0].CLK
CLK12MHZ => count8Hz[1].CLK
CLK12MHZ => count8Hz[2].CLK
CLK12MHZ => count8Hz[3].CLK
CLK12MHZ => count8Hz[4].CLK
CLK12MHZ => count8Hz[5].CLK
CLK12MHZ => count8Hz[6].CLK
CLK12MHZ => count8Hz[7].CLK
CLK12MHZ => count8Hz[8].CLK
CLK12MHZ => count8Hz[9].CLK
CLK12MHZ => count8Hz[10].CLK
CLK12MHZ => count8Hz[11].CLK
CLK12MHZ => count8Hz[12].CLK
CLK12MHZ => count8Hz[13].CLK
CLK12MHZ => count8Hz[14].CLK
CLK12MHZ => count8Hz[15].CLK
CLK12MHZ => count8Hz[16].CLK
CLK12MHZ => count8Hz[17].CLK
CLK12MHZ => count8Hz[18].CLK
CLK12MHZ => count8Hz[19].CLK
CODE3[0] <= ToneTaba:u2.CODE[0]
CODE3[1] <= ToneTaba:u2.CODE[1]
CODE3[2] <= ToneTaba:u2.CODE[2]
CODE3[3] <= ToneTaba:u2.CODE[3]
HIGH2 <= ToneTaba:u2.HIGH
SPKOUT2 <= Speakera:u3.SpkS


|mux21a|Songer:u2|NoteTabs:u1
clk => MUSIC:u1.inclock
clk => Counter[0].CLK
clk => Counter[1].CLK
clk => Counter[2].CLK
clk => Counter[3].CLK
clk => Counter[4].CLK
clk => Counter[5].CLK
clk => Counter[6].CLK
clk => Counter[7].CLK
ToneIndex[0] <= MUSIC:u1.q[0]
ToneIndex[1] <= MUSIC:u1.q[1]
ToneIndex[2] <= MUSIC:u1.q[2]
ToneIndex[3] <= MUSIC:u1.q[3]


|mux21a|Songer:u2|NoteTabs:u1|music:u1
address[0] => lpm_rom:lpm_rom_component.address[0]
address[1] => lpm_rom:lpm_rom_component.address[1]
address[2] => lpm_rom:lpm_rom_component.address[2]
address[3] => lpm_rom:lpm_rom_component.address[3]
address[4] => lpm_rom:lpm_rom_component.address[4]
address[5] => lpm_rom:lpm_rom_component.address[5]
address[6] => lpm_rom:lpm_rom_component.address[6]
address[7] => lpm_rom:lpm_rom_component.address[7]
inclock => lpm_rom:lpm_rom_component.inclock
q[0] <= lpm_rom:lpm_rom_component.q[0]
q[1] <= lpm_rom:lpm_rom_component.q[1]
q[2] <= lpm_rom:lpm_rom_component.q[2]
q[3] <= lpm_rom:lpm_rom_component.q[3]


|mux21a|Songer:u2|NoteTabs:u1|music:u1|lpm_rom:lpm_rom_component
address[0] => altrom:srom.address[0]
address[1] => altrom:srom.address[1]
address[2] => altrom:srom.address[2]
address[3] => altrom:srom.address[3]
address[4] => altrom:srom.address[4]
address[5] => altrom:srom.address[5]
address[6] => altrom:srom.address[6]
address[7] => altrom:srom.address[7]
inclock => altrom:srom.clocki
outclock => ~NO_FANOUT~
memenab => otri[3].OE
memenab => otri[2].OE
memenab => otri[1].OE
memenab => otri[0].OE
q[0] <= otri[0].DB_MAX_OUTPUT_PORT_TYPE
q[1] <= otri[1].DB_MAX_OUTPUT_PORT_TYPE
q[2] <= otri[2].DB_MAX_OUTPUT_PORT_TYPE
q[3] <= otri[3].DB_MAX_OUTPUT_PORT_TYPE


|mux21a|Songer:u2|NoteTabs:u1|music:u1|lpm_rom:lpm_rom_component|altrom:srom
address[0] => segment[0][3].WADDR
address[0] => segment[0][3].RADDR
address[0] => segment[0][2].WADDR
address[0] => segment[0][2].RADDR
address[0] => segment[0][1].WADDR
address[0] => segment[0][1].RADDR
address[0] => segment[0][0].WADDR
address[0] => segment[0][0].RADDR
address[1] => segment[0][3].WADDR1
address[1] => segment[0][3].RADDR1
address[1] => segment[0][2].WADDR1
address[1] => segment[0][2].RADDR1
address[1] => segment[0][1].WADDR1
address[1] => segment[0][1].RADDR1
address[1] => segment[0][0].WADDR1
address[1] => segment[0][0].RADDR1
address[2] => segment[0][3].WADDR2
address[2] => segment[0][3].RADDR2
address[2] => segment[0][2].WADDR2
address[2] => segment[0][2].RADDR2
address[2] => segment[0][1].WADDR2
address[2] => segment[0][1].RADDR2
address[2] => segment[0][0].WADDR2
address[2] => segment[0][0].RADDR2
address[3] => segment[0][3].WADDR3
address[3] => segment[0][3].RADDR3
address[3] => segment[0][2].WADDR3
address[3] => segment[0][2].RADDR3
address[3] => segment[0][1].WADDR3
address[3] => segment[0][1].RADDR3
address[3] => segment[0][0].WADDR3
address[3] => segment[0][0].RADDR3
address[4] => segment[0][3].WADDR4
address[4] => segment[0][3].RADDR4
address[4] => segment[0][2].WADDR4
address[4] => segment[0][2].RADDR4
address[4] => segment[0][1].WADDR4
address[4] => segment[0][1].RADDR4
address[4] => segment[0][0].WADDR4
address[4] => segment[0][0].RADDR4
address[5] => segment[0][3].WADDR5
address[5] => segment[0][3].RADDR5
address[5] => segment[0][2].WADDR5
address[5] => segment[0][2].RADDR5
address[5] => segment[0][1].WADDR5
address[5] => segment[0][1].RADDR5
address[5] => segment[0][0].WADDR5
address[5] => segment[0][0].RADDR5
address[6] => segment[0][3].WADDR6
address[6] => segment[0][3].RADDR6
address[6] => segment[0][2].WADDR6
address[6] => segment[0][2].RADDR6
address[6] => segment[0][1].WADDR6
address[6] => segment[0][1].RADDR6
address[6] => segment[0][0].WADDR6
address[6] => segment[0][0].RADDR6
address[7] => segment[0][3].WADDR7
address[7] => segment[0][3].RADDR7
address[7] => segment[0][2].WADDR7
address[7] => segment[0][2].RADDR7
address[7] => segment[0][1].WADDR7
address[7] => segment[0][1].RADDR7
address[7] => segment[0][0].WADDR7
address[7] => segment[0][0].RADDR7
clocki => segment[0][3].CLK0
clocki => segment[0][2].CLK0
clocki => segment[0][1].CLK0
clocki => segment[0][0].CLK0
clocko => ~NO_FANOUT~
q[0] <= segment[0][0].DATAOUT
q[1] <= segment[0][1].DATAOUT
q[2] <= segment[0][2].DATAOUT
q[3] <= segment[0][3].DATAOUT


|mux21a|Songer:u2|ToneTaba:u2
Index[0] => Mux0.IN19
Index[0] => Mux1.IN19
Index[0] => Mux2.IN19
Index[0] => Mux3.IN19
Index[0] => Mux4.IN19
Index[0] => Mux5.IN19
Index[0] => Mux6.IN19
Index[0] => Mux7.IN19
Index[0] => Mux8.IN19
Index[0] => Mux9.IN19
Index[0] => Mux10.IN19
Index[0] => Mux11.IN19
Index[0] => Mux12.IN19
Index[0] => Mux13.IN19
Index[0] => Mux14.IN19
Index[0] => Mux15.IN19
Index[0] => Mux16.IN19
Index[0] => Mux17.IN19
Index[1] => Mux0.IN18
Index[1] => Mux1.IN18
Index[1] => Mux2.IN18
Index[1] => Mux3.IN18
Index[1] => Mux4.IN18
Index[1] => Mux5.IN18
Index[1] => Mux6.IN18
Index[1] => Mux7.IN18
Index[1] => Mux8.IN18
Index[1] => Mux9.IN18
Index[1] => Mux10.IN18
Index[1] => Mux11.IN18
Index[1] => Mux12.IN18
Index[1] => Mux13.IN18
Index[1] => Mux14.IN18
Index[1] => Mux15.IN18
Index[1] => Mux16.IN18
Index[1] => Mux17.IN18
Index[2] => Mux0.IN17
Index[2] => Mux1.IN17
Index[2] => Mux2.IN17
Index[2] => Mux3.IN17
Index[2] => Mux4.IN17
Index[2] => Mux5.IN17
Index[2] => Mux6.IN17
Index[2] => Mux7.IN17
Index[2] => Mux8.IN17
Index[2] => Mux9.IN17
Index[2] => Mux10.IN17
Index[2] => Mux11.IN17
Index[2] => Mux12.IN17
Index[2] => Mux13.IN17
Index[2] => Mux14.IN17
Index[2] => Mux15.IN17
Index[2] => Mux16.IN17
Index[2] => Mux17.IN17
Index[3] => Mux0.IN16
Index[3] => Mux1.IN16
Index[3] => Mux2.IN16
Index[3] => Mux3.IN16
Index[3] => Mux4.IN16
Index[3] => Mux5.IN16
Index[3] => Mux6.IN16
Index[3] => Mux7.IN16
Index[3] => Mux8.IN16
Index[3] => Mux9.IN16
Index[3] => Mux10.IN16
Index[3] => Mux11.IN16
Index[3] => Mux12.IN16
Index[3] => Mux13.IN16
Index[3] => Mux14.IN16
Index[3] => Mux15.IN16
Index[3] => Mux16.IN16
Index[3] => Mux17.IN16
CODE[0] <= CODE[0]$latch.DB_MAX_OUTPUT_PORT_TYPE
CODE[1] <= CODE[1]$latch.DB_MAX_OUTPUT_PORT_TYPE
CODE[2] <= CODE[2]$latch.DB_MAX_OUTPUT_PORT_TYPE
CODE[3] <= CODE[3]$latch.DB_MAX_OUTPUT_PORT_TYPE
HIGH <= HIGH$latch.DB_MAX_OUTPUT_PORT_TYPE
Tone[0] <= Tone[0]$latch.DB_MAX_OUTPUT_PORT_TYPE
Tone[1] <= Tone[1]$latch.DB_MAX_OUTPUT_PORT_TYPE
Tone[2] <= Tone[2]$latch.DB_MAX_OUTPUT_PORT_TYPE
Tone[3] <= Tone[3]$latch.DB_MAX_OUTPUT_PORT_TYPE
Tone[4] <= Tone[4]$latch.DB_MAX_OUTPUT_PORT_TYPE
Tone[5] <= Tone[5]$latch.DB_MAX_OUTPUT_PORT_TYPE
Tone[6] <= Tone[6]$latch.DB_MAX_OUTPUT_PORT_TYPE
Tone[7] <= Tone[7]$latch.DB_MAX_OUTPUT_PORT_TYPE
Tone[8] <= Tone[8]$latch.DB_MAX_OUTPUT_PORT_TYPE
Tone[9] <= Tone[9]$latch.DB_MAX_OUTPUT_PORT_TYPE
Tone[10] <= Tone[10]$latch.DB_MAX_OUTPUT_PORT_TYPE


|mux21a|Songer:u2|Speakera:u3
clk => \DivideCLK:Count4[0].CLK
clk => \DivideCLK:Count4[1].CLK
clk => \DivideCLK:Count4[2].CLK
clk => \DivideCLK:Count4[3].CLK
Tone[0] => Count11~10.DATAB
Tone[1] => Count11~9.DATAB
Tone[2] => Count11~8.DATAB
Tone[3] => Count11~7.DATAB
Tone[4] => Count11~6.DATAB
Tone[5] => Count11~5.DATAB
Tone[6] => Count11~4.DATAB
Tone[7] => Count11~3.DATAB
Tone[8] => Count11~2.DATAB
Tone[9] => Count11~1.DATAB
Tone[10] => Count11~0.DATAB
SpkS <= SpkS~reg0.DB_MAX_OUTPUT_PORT_TYPE