cskz.vhd

交通灯控制系统VHDL源码

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY CSKZ IS
  PORT(INA:IN STD_LOGIC;
       OUTA:OUT STD_LOGIC);
END ENTITY CSKZ;

ARCHITECTURE ART OF CSKZ IS
  BEGIN
  PROCESS(INA) IS
    BEGIN
    IF INA='1' THEN OUTA<='1';
    END IF;
  END PROCESS;
END ARCHITECTURE ART;