cnt25s.rpt

交通灯控制系统VHDL源码

-- Equation name is '_LC7_B2', type is buried 
_LC7_B2  = LCELL( _EQ073);
  _EQ073 = !_LC5_B11
         #  _LC1_B1
         #  _LC5_B3
         #  _LC6_B2;

-- Node name is '~2767~1' 
-- Equation name is '~2767~1', location is LC5_B9, type is buried.
-- synthesized logic cell 
_LC5_B9  = LCELL( _EQ074);
  _EQ074 =  _LC1_B7 &  _LC4_B24
         #  _LC1_B7 &  _LC2_B1
         #  _LC2_B11;

-- Node name is ':2767' 
-- Equation name is '_LC8_B9', type is buried 
_LC8_B9  = LCELL( _EQ075);
  _EQ075 =  _LC3_B24 &  _LC4_B1
         #  _LC2_B24
         # !_LC6_B9;

-- Node name is ':2800' 
-- Equation name is '_LC4_B9', type is buried 
_LC4_B9  = LCELL( _EQ076);
  _EQ076 =  _LC2_B2 & !_LC5_B3 &  _LC8_B9
         #  _LC1_B1;

-- Node name is '~2802~1' 
-- Equation name is '~2802~1', location is LC5_B11, type is buried.
-- synthesized logic cell 
!_LC5_B11 = _LC5_B11~NOT;
_LC5_B11~NOT = LCELL( _EQ077);
  _EQ077 = !_LC1_B7 &  _LC2_B1
         #  _LC1_B11
         #  _LC1_B3 & !_LC1_B7;

-- Node name is '~2802~2' 
-- Equation name is '~2802~2', location is LC2_B2, type is buried.
-- synthesized logic cell 
_LC2_B2  = LCELL( _EQ078);
  _EQ078 =  _LC5_B11 & !_LC6_B2;

-- Node name is ':2815' 
-- Equation name is '_LC3_B3', type is buried 
!_LC3_B3 = _LC3_B3~NOT;
_LC3_B3~NOT = LCELL( _EQ079);
  _EQ079 = !_LC4_B11 & !_LC8_B3
         # !_LC3_B24 & !_LC4_B11
         # !_LC1_B7 & !_LC4_B11;

-- Node name is '~2844~1' 
-- Equation name is '~2844~1', location is LC6_B9, type is buried.
-- synthesized logic cell 
_LC6_B9  = LCELL( _EQ080);
  _EQ080 = !_LC3_B7 & !_LC4_B3 & !_LC5_B9 & !_LC6_B1;

-- Node name is ':2845' 
-- Equation name is '_LC7_B9', type is buried 
_LC7_B9  = LCELL( _EQ081);
  _EQ081 =  _LC2_B24
         #  _LC2_B9
         #  _LC3_B3 &  _LC6_B9;

-- Node name is '~2874~1' 
-- Equation name is '~2874~1', location is LC5_B7, type is buried.
-- synthesized logic cell 
!_LC5_B7 = _LC5_B7~NOT;
_LC5_B7~NOT = LCELL( _EQ082);
  _EQ082 = !_LC3_B24 &  _LC4_B1
         #  _LC2_B7;

-- Node name is ':2880' 
-- Equation name is '_LC1_B9', type is buried 
_LC1_B9  = LCELL( _EQ083);
  _EQ083 = !_LC1_B1 &  _LC2_B2 &  _LC7_B9
         # !_LC1_B1 &  _LC5_B3;

-- Node name is ':2887' 
-- Equation name is '_LC4_B5', type is buried 
_LC4_B5  = LCELL( _EQ084);
  _EQ084 =  _LC1_B7 &  _LC1_B24 & !_LC5_B24
         #  _LC1_B5;

-- Node name is '~2910~1' 
-- Equation name is '~2910~1', location is LC6_B10, type is buried.
-- synthesized logic cell 
_LC6_B10 = LCELL( _EQ085);
  _EQ085 = !_LC3_B9 & !_LC4_B3 & !_LC4_B11;

-- Node name is ':2917' 
-- Equation name is '_LC7_B10', type is buried 
_LC7_B10 = LCELL( _EQ086);
  _EQ086 =  _LC4_B5 &  _LC6_B10
         #  _LC3_B7
         #  _LC6_B1;

-- Node name is '~2940~1' 
-- Equation name is '~2940~1', location is LC2_B17, type is buried.
-- synthesized logic cell 
_LC2_B17 = LCELL( _EQ087);
  _EQ087 = !_LC2_B9 & !_LC2_B24 & !_LC4_B7;

-- Node name is '~2940~2' 
-- Equation name is '~2940~2', location is LC1_B17, type is buried.
-- synthesized logic cell 
_LC1_B17 = LCELL( _EQ088);
  _EQ088 =  _LC2_B17 & !_LC4_B1
         #  _LC2_B17 &  _LC3_B24;

-- Node name is '~2947~1' 
-- Equation name is '~2947~1', location is LC7_B12, type is buried.
-- synthesized logic cell 
!_LC7_B12 = _LC7_B12~NOT;
_LC7_B12~NOT = LCELL( _EQ089);
  _EQ089 = !_LC1_B11 & !_LC2_B1 &  _LC7_B3
         #  _LC1_B7 & !_LC1_B11 &  _LC7_B3;

-- Node name is ':2947' 
-- Equation name is '_LC8_B10', type is buried 
_LC8_B10 = LCELL( _EQ090);
  _EQ090 =  _LC1_B17 & !_LC2_B7 &  _LC7_B10
         #  _LC7_B12;

-- Node name is ':2958' 
-- Equation name is '_LC1_B10', type is buried 
_LC1_B10 = LCELL( _EQ091);
  _EQ091 =  _LC2_B13 & !_LC3_B1 &  _LC8_B10
         #  _LC2_B13 &  _LC3_B24 &  _LC8_B10;

-- Node name is '~2982~1' 
-- Equation name is '~2982~1', location is LC1_B12, type is buried.
-- synthesized logic cell 
_LC1_B12 = LCELL( _EQ092);
  _EQ092 = !_LC1_B7 & !_LC3_B3
         # !_LC2_B1 & !_LC3_B3 & !_LC4_B24;

-- Node name is ':2983' 
-- Equation name is '_LC2_B12', type is buried 
_LC2_B12 = LCELL( _EQ093);
  _EQ093 =  _LC1_B12 &  _LC4_B5
         #  _LC4_B3
         #  _LC2_B11;

-- Node name is '~2995~1' 
-- Equation name is '~2995~1', location is LC1_B6, type is buried.
-- synthesized logic cell 
_LC1_B6  = LCELL( _EQ094);
  _EQ094 =  _LC3_B24 &  _LC7_B1
         #  _LC3_B24 &  _LC8_B1;

-- Node name is ':2995' 
-- Equation name is '_LC3_B12', type is buried 
_LC3_B12 = LCELL( _EQ095);
  _EQ095 =  _LC2_B12 & !_LC6_B1 & !_LC8_B7
         #  _LC1_B6;

-- Node name is ':3024' 
-- Equation name is '_LC4_B12', type is buried 
_LC4_B12 = LCELL( _EQ096);
  _EQ096 = !_LC5_B7 &  _LC7_B3
         #  _LC2_B17 &  _LC3_B12 &  _LC7_B3;

-- Node name is ':3025' 
-- Equation name is '_LC8_B12', type is buried 
_LC8_B12 = LCELL( _EQ097);
  _EQ097 = !_LC1_B7 &  _LC4_B24
         # !_LC1_B7 &  _LC2_B1
         #  _LC4_B12;

-- Node name is '~3036~1' 
-- Equation name is '~3036~1', location is LC2_B13, type is buried.
-- synthesized logic cell 
_LC2_B13 = LCELL( _EQ098);
  _EQ098 = !_LC1_B1 & !_LC2_B3;

-- Node name is ':3036' 
-- Equation name is '_LC6_B12', type is buried 
_LC6_B12 = LCELL( _EQ099);
  _EQ099 =  _LC2_B13 & !_LC3_B1 &  _LC8_B12
         #  _LC2_B13 &  _LC3_B24 &  _LC8_B12;

-- Node name is ':3049' 
-- Equation name is '_LC6_B5', type is buried 
_LC6_B5  = LCELL( _EQ100);
  _EQ100 =  _LC1_B3 &  _LC1_B7
         #  _LC1_B7 &  _LC1_B24 & !_LC5_B24;

-- Node name is ':3055' 
-- Equation name is '_LC7_B5', type is buried 
_LC7_B5  = LCELL( _EQ101);
  _EQ101 =  _LC1_B7 &  _LC4_B24
         # !_LC2_B1 &  _LC6_B5
         # !_LC1_B7 &  _LC6_B5;

-- Node name is ':3069' 
-- Equation name is '_LC3_B5', type is buried 
_LC3_B5  = LCELL( _EQ102);
  _EQ102 = !_LC2_B11 & !_LC6_B1 &  _LC7_B5
         #  _LC4_B3 & !_LC6_B1;

-- Node name is ':3075' 
-- Equation name is '_LC1_B8', type is buried 
_LC1_B8  = LCELL( _EQ103);
  _EQ103 =  _LC3_B5 & !_LC7_B1
         #  _LC3_B5 & !_LC3_B24
         # !_LC7_B1 &  _LC8_B7
         # !_LC3_B24 &  _LC8_B7;

-- Node name is ':3081' 
-- Equation name is '_LC2_B8', type is buried 
_LC2_B8  = LCELL( _EQ104);
  _EQ104 = !_LC2_B9 &  _LC3_B24 &  _LC8_B1
         #  _LC1_B8 & !_LC2_B9;

-- Node name is ':3087' 
-- Equation name is '_LC3_B8', type is buried 
_LC3_B8  = LCELL( _EQ105);
  _EQ105 =  _LC2_B8 & !_LC7_B1
         #  _LC2_B8 &  _LC3_B24
         #  _LC2_B24 & !_LC7_B1
         #  _LC2_B24 &  _LC3_B24;

-- Node name is ':3093' 
-- Equation name is '_LC4_B8', type is buried 
_LC4_B8  = LCELL( _EQ106);
  _EQ106 = !_LC3_B24 & !_LC4_B1 &  _LC8_B1
         #  _LC3_B8 & !_LC4_B1
         #  _LC3_B8 &  _LC3_B24;

-- Node name is ':3099' 
-- Equation name is '_LC5_B8', type is buried 
_LC5_B8  = LCELL( _EQ107);
  _EQ107 = !_LC3_B1 &  _LC4_B8
         # !_LC3_B24 &  _LC4_B8
         #  _LC2_B7 & !_LC3_B1
         #  _LC2_B7 & !_LC3_B24;

-- Node name is ':3105' 
-- Equation name is '_LC7_B8', type is buried 
_LC7_B8  = LCELL( _EQ108);
  _EQ108 =  _LC1_B3 & !_LC1_B7 & !_LC2_B1
         # !_LC2_B1 &  _LC5_B8
         #  _LC1_B7 &  _LC5_B8;

-- Node name is ':3111' 
-- Equation name is '_LC8_B8', type is buried 
_LC8_B8  = LCELL( _EQ109);
  _EQ109 = !_LC3_B1 &  _LC7_B8
         #  _LC3_B24 &  _LC7_B8
         #  _LC1_B11 & !_LC3_B1
         #  _LC1_B11 &  _LC3_B24;

-- Node name is ':3114' 
-- Equation name is '_LC6_B8', type is buried 
_LC6_B8  = LCELL( _EQ110);
  _EQ110 = !_LC1_B1 &  _LC8_B8
         # !_LC1_B1 &  _LC2_B3;



Project Information                               d:\max2work\jtdkz\cnt25s.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10KA' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:01
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:00
   Fitter                                 00:00:01
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:01
   --------------------------             --------
   Total Time                             00:00:03


Memory Allocated
-----------------

Peak memory allocated during compilation  = 11,676K