lib.dls

利用FPGA编写的键盘译码程序

DLSL
1
ADDBCD.VHDLVIEW U4670848.DLS
ADDBCD-RT1.SYNTHESISVIEW U5836067.DLS
ADDBCD-RT1.VHDLVIEW U8432702.DLS
CNT.VHDLVIEW U8069293.DLS
CNT-CNT_ARCH.SYNTHESISVIEW U3612077.DLS
CNT-CNT_ARCH.VHDLVIEW U0680169.DLS
CNTA.VHDLVIEW U0185336.DLS
CNTA-CNT_ARC.SYNTHESISVIEW U2501512.DLS
CNTA-CNT_ARC.VHDLVIEW U9421128.DLS
DCLK.VHDLVIEW U1258294.DLS
DCLK-DCLK_ARCH.SYNTHESISVIEW U4531232.DLS
DCLK-DCLK_ARCH.VHDLVIEW U1618365.DLS
JIA.VHDLVIEW U7340649.DLS
JIA-RT1.SYNTHESISVIEW U4056875.DLS
JIA-RT1.VHDLVIEW U2301280.DLS
XIANSHI.VHDLVIEW U2379027.DLS
XIANSHI-RT1.SYNTHESISVIEW U8916032.DLS
XIANSHI-RT1.VHDLVIEW U6619219.DLS
YIMA.VHDLVIEW U7228860.DLS
YIMA-YIMA_ARCH.SYNTHESISVIEW U4270671.DLS
YIMA-YIMA_ARCH.VHDLVIEW U4334278.DLS