prev_cmp_rs_ccd.map.qmsg

基于CPLD的CCD驱动程序源码

{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "XSG2 rs_ccd.vhd(198) " "Warning (10631): VHDL Process Statement warning at rs_ccd.vhd(198): inferring latch(es) for signal or variable \"XSG2\", which holds its previous value in one or more paths through the process" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 198 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "H1 rs_ccd.vhd(8) " "Warning (10034): Output port \"H1\" at rs_ccd.vhd(8) has no driver" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 8 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "XSG2 rs_ccd.vhd(198) " "Info (10041): Inferred latch for \"XSG2\" at rs_ccd.vhd(198)" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 198 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "XSG1 rs_ccd.vhd(198) " "Info (10041): Inferred latch for \"XSG1\" at rs_ccd.vhd(198)" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 198 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "SUB rs_ccd.vhd(198) " "Info (10041): Inferred latch for \"SUB\" at rs_ccd.vhd(198)" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 198 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "V4 rs_ccd.vhd(198) " "Info (10041): Inferred latch for \"V4\" at rs_ccd.vhd(198)" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 198 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "V3 rs_ccd.vhd(198) " "Info (10041): Inferred latch for \"V3\" at rs_ccd.vhd(198)" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 198 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "V2 rs_ccd.vhd(198) " "Info (10041): Inferred latch for \"V2\" at rs_ccd.vhd(198)" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 198 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "V1 rs_ccd.vhd(198) " "Info (10041): Inferred latch for \"V1\" at rs_ccd.vhd(198)" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 198 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "WE rs_ccd.vhd(104) " "Info (10041): Inferred latch for \"WE\" at rs_ccd.vhd(104)" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 104 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "CS rs_ccd.vhd(78) " "Info (10041): Inferred latch for \"CS\" at rs_ccd.vhd(78)" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 78 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "SUBINT1 rs_ccd.vhd(55) " "Info (10041): Inferred latch for \"SUBINT1\" at rs_ccd.vhd(55)" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 55 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "4 " "Info: Inferred 4 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "NumRG\[0\]~308 10 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=10) from the following logic: \"NumRG\[0\]~308\"" {  } { { "rs_ccd.vhd" "NumRG\[0\]~308" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 66 -1 0 } }  } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "Address3\[0\]~18 18 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=18) from the following logic: \"Address3\[0\]~18\"" {  } { { "rs_ccd.vhd" "Address3\[0\]~18" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 165 -1 0 } }  } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "Address2\[0\]~621 18 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=18) from the following logic: \"Address2\[0\]~621\"" {  } { { "rs_ccd.vhd" "Address2\[0\]~621" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 147 -1 0 } }  } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "NumVH\[0\]~9 9 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=9) from the following logic: \"NumVH\[0\]~9\"" {  } { { "rs_ccd.vhd" "NumVH\[0\]~9" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 46 -1 0 } }  } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "Inferred %1!d! megafunctions from design logic" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/program files/quartus2/quartus/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file e:/program files/quartus2/quartus/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "lpm_counter.tdf" "" { Text "e:/program files/quartus2/quartus/libraries/megafunctions/lpm_counter.tdf" 248 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_counter:NumRG_rtl_0 " "Info: Elaborated megafunction instantiation \"lpm_counter:NumRG_rtl_0\"" {  } {  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_counter:Address3_rtl_1 " "Info: Elaborated megafunction instantiation \"lpm_counter:Address3_rtl_1\"" {  } {  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_counter:Address2_rtl_2 " "Info: Elaborated megafunction instantiation \"lpm_counter:Address2_rtl_2\"" {  } {  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_counter:NumVH_rtl_3 " "Info: Elaborated megafunction instantiation \"lpm_counter:NumVH_rtl_3\"" {  } {  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_USE_LATCH" "V1 " "Warning: LATCH primitive \"V1\" is permanently enabled" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 20 -1 0 } }  } 0 0 "LATCH primitive \"%1!s!\" is permanently enabled" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_USE_LATCH" "V2 " "Warning: LATCH primitive \"V2\" is permanently enabled" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 20 -1 0 } }  } 0 0 "LATCH primitive \"%1!s!\" is permanently enabled" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_USE_LATCH" "V4 " "Warning: LATCH primitive \"V4\" is permanently enabled" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 20 -1 0 } }  } 0 0 "LATCH primitive \"%1!s!\" is permanently enabled" 0 0 "" 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "H1 GND " "Warning (13410): Pin \"H1\" stuck at GND" {  } { { "rs_ccd.vhd" "" { Text "D:/CCDVHDL/ICX408AL 75M/rs_ccd.vhd" 8 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "CLK " "Info: Promoted clock signal driven by pin \"CLK\" to global clock signal" {  } {  } 0 0 "Promoted clock signal driven by pin \"%1!s!\" to global clock signal" 0 0 "" 0}  } {  } 0 0 "Promoted pin-driven signal(s) to global signal" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "248 " "Info: Implemented 248 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "4 " "Info: Implemented 4 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "36 " "Info: Implemented 36 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_MCELLS" "185 " "Info: Implemented 185 macrocells" {  } {  } 0 0 "Implemented %1!d! macrocells" 0 0 "" 0} { "Info" "ICUT_CUT_TM_SEXPS" "23 " "Info: Implemented 23 shareable expanders" {  } {  } 0 0 "Implemented %1!d! shareable expanders" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 28 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 28 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "159 " "Info: Allocated 159 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue Feb 10 11:29:13 2009 " "Info: Processing ended: Tue Feb 10 11:29:13 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:11 " "Info: Elapsed time: 00:00:11" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}