plltest.fit.summary

来自「Altera Quartus to Pll Source」· SUMMARY 代码 · 共 17 行

Fitter Status : Successful - Thu Jan 08 16:47:14 2009
Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version
Revision Name : PLLTEST
Top-level Entity Name : PLLTEST
Family : Cyclone II
Device : EP2C8Q208C8
Timing Models : Final
Total logic elements : 4 / 8,256 ( < 1 % )
    Total combinational functions : 4 / 8,256 ( < 1 % )
    Dedicated logic registers : 4 / 8,256 ( < 1 % )
Total registers : 4
Total pins : 5 / 138 ( 4 % )
Total virtual pins : 0
Total memory bits : 0 / 165,888 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 36 ( 0 % )
Total PLLs : 1 / 2 ( 50 % )