c_a_v.sdo

GPS中C/A码产生简单的Verilog逻辑产生

// Copyright (C) 1991-2006 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.


// 
// Device: Altera EP1S10F484C5 Package FBGA484
// 

// 
// This SDF file should be used for PrimeTime (Verilog) only
// 

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "c_a")
  (DATE "02/27/2009 15:44:41")
  (VENDOR "Altera")
  (PROGRAM "Quartus II")
  (VERSION "Version 6.0 Build 178 04/27/2006 SJ Full Version")
  (DIVIDER .)
  (TIMESCALE 1 ps)

  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE clk\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (828:828:828) (828:828:828))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE clr\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (725:725:725) (725:725:725))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q1\[2\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (406:406:406) (406:406:406))
        (PORT datad (3878:3878:3878) (3878:3878:3878))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "AND2")
    (INSTANCE Q1\[2\]\~reg0_I.regin_datac)
    (DELAY
      (ABSOLUTE
        (PORT IN2 (725:725:725) (725:725:725))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q1\[2\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2124:2124:2124) (2124:2124:2124))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q1\[3\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (405:405:405) (405:405:405))
        (PORT datad (3882:3882:3882) (3882:3882:3882))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q1\[3\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2124:2124:2124) (2124:2124:2124))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q1\[4\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (401:401:401) (401:401:401))
        (PORT datad (3876:3876:3876) (3876:3876:3876))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q1\[4\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2124:2124:2124) (2124:2124:2124))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q1\[5\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (408:408:408) (408:408:408))
        (PORT datad (3885:3885:3885) (3885:3885:3885))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q1\[5\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2124:2124:2124) (2124:2124:2124))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q1\[6\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (406:406:406) (406:406:406))
        (PORT datad (3884:3884:3884) (3884:3884:3884))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q1\[6\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2124:2124:2124) (2124:2124:2124))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q1\[7\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (405:405:405) (405:405:405))
        (PORT datad (3877:3877:3877) (3877:3877:3877))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "AND2")
    (INSTANCE Q1\[7\]\~reg0_I.regin_datac)
    (DELAY
      (ABSOLUTE
        (PORT IN2 (724:724:724) (724:724:724))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q1\[7\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2124:2124:2124) (2124:2124:2124))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q1\[8\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (408:408:408) (408:408:408))
        (PORT datad (3886:3886:3886) (3886:3886:3886))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "AND2")
    (INSTANCE Q1\[8\]\~reg0_I.regin_datac)
    (DELAY
      (ABSOLUTE
        (PORT IN2 (727:727:727) (727:727:727))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q1\[8\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2124:2124:2124) (2124:2124:2124))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q1\[9\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (400:400:400) (400:400:400))
        (PORT datad (3875:3875:3875) (3875:3875:3875))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q1\[9\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2124:2124:2124) (2124:2124:2124))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q1\[10\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (403:403:403) (403:403:403))
        (PORT datad (3884:3884:3884) (3884:3884:3884))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "AND2")
    (INSTANCE Q1\[10\]\~reg0_I.regin_datac)
    (DELAY
      (ABSOLUTE
        (PORT IN2 (722:722:722) (722:722:722))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q1\[10\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2124:2124:2124) (2124:2124:2124))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q1\[1\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (406:406:406) (406:406:406))
        (PORT datab (402:402:402) (402:402:402))
        (PORT datad (419:419:419) (419:419:419))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH datad regin (223:223:223) (223:223:223))
        (IOPATH qfbkin regin (389:389:389) (389:389:389))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q1\[1\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sload (4742:4742:4742) (4742:4742:4742))
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2124:2124:2124) (2124:2124:2124))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
        (IOPATH (posedge clk) qfbkout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) qfbkout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP sload (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD sload (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q2\[2\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (411:411:411) (411:411:411))
        (PORT datad (3819:3819:3819) (3819:3819:3819))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "AND2")
    (INSTANCE Q2\[2\]\~reg0_I.regin_datac)
    (DELAY
      (ABSOLUTE
        (PORT IN2 (730:730:730) (730:730:730))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q2\[2\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2158:2158:2158) (2158:2158:2158))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q2\[3\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (547:547:547) (547:547:547))
        (PORT datad (3815:3815:3815) (3815:3815:3815))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "AND2")
    (INSTANCE Q2\[3\]\~reg0_I.regin_datac)
    (DELAY
      (ABSOLUTE
        (PORT IN2 (866:866:866) (866:866:866))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q2\[3\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2158:2158:2158) (2158:2158:2158))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q2\[4\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (530:530:530) (530:530:530))
        (PORT datad (3905:3905:3905) (3905:3905:3905))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q2\[4\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2158:2158:2158) (2158:2158:2158))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q2\[5\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (537:537:537) (537:537:537))
        (PORT datad (3820:3820:3820) (3820:3820:3820))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q2\[5\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2158:2158:2158) (2158:2158:2158))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q2\[6\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (393:393:393) (393:393:393))
        (PORT datad (3820:3820:3820) (3820:3820:3820))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH datad regin (223:223:223) (223:223:223))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE Q2\[6\]\~reg0_I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (645:645:645) (645:645:645))
        (PORT clk (2158:2158:2158) (2158:2158:2158))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE Q2\[7\]\~reg0_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (416:416:416) (416:416:416))
        (PORT datad (3812:3812:3812) (3812:3812:3812))