constrains.ucf

This is controler graphic LCD in vhdl

NET  "clk"    LOC = "p90"  ; # Slow: 1 .. 1000Hz
# LCD Graphic  -----------------------------------------
NET "D_LCD<0>"  LOC = "p89"  ; # led0 and LCD D0
NET "D_LCD<1>"  LOC = "p88"  ;
NET "D_LCD<2>"  LOC = "p87"  ;
NET "D_LCD<3>"  LOC = "p86"  ;
NET "D_LCD<4>"  LOC = "p85"  ;
NET "D_LCD<5>"  LOC = "p81"  ;
NET "D_LCD<6>"  LOC = "p80"  ;
NET "D_LCD<7>"  LOC = "p79"  ;

NET "E_LCD"     LOC = "p2"   ; # enable
NET "DI_LCD"    LOC = "p92"  ; # Data or (not) Instruction (RS)
NET "CS1_LCD"   LOC = "p21"  ; # chip select 1
NET "CS2_LCD"   LOC = "p22"  ; # chip select 2
NET "RST_LCD"   LOC = "p17"  ; # Display reset