word.txt

Code was successfully implemented within ALtera FPGA with Quartus 6.0. It presents two polish own fe

Program


library ieee;                                                 -- def podstawowych bibliotek
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;

entity wysw is
	port (clk,s : in std_logic;                  -- sygna硑 wej渃iowe: clock oraz przycisk 剆