uart_top.hif

实现FPGA和上位机的串口通信

Version 7.0 Build 33 02/05/2007 SJ Full Version
35
1951
OFF
OFF
OFF
OFF
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
uart_top
# storage
db|uart_top.(0).cnf
db|uart_top.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
uart_top.vhd
9c5c5ea141c9f725b465570285931b0
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
data_bit
8
PARAMETER_SIGNED_DEC
DEF
total_bit
10
PARAMETER_SIGNED_DEC
DEF
parity_rule
NONE
PARAMETER_ENUM
DEF
full_pulse_count
5208
PARAMETER_SIGNED_DEC
DEF
rise_pulse_count
2604
PARAMETER_SIGNED_DEC
DEF
}
# include_file {
UART_PACKAGE.vhd
cd565d23cbfc1d9645cf58155b3d65c4
}
# hierarchies {
|
}
# end
# entity
baudrate_generator
# storage
db|uart_top.(1).cnf
db|uart_top.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
baudrate_generator.vhd
f2d9492cbf324deca8563f2852a9dc
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
full_pulse_count
5208
PARAMETER_SIGNED_DEC
USR
rise_pulse_count
2604
PARAMETER_SIGNED_DEC
USR
}
# include_file {
UART_PACKAGE.vhd
cd565d23cbfc1d9645cf58155b3d65c4
}
# hierarchies {
baudrate_generator:U_BG
}
# end
# entity
switch_bus
# storage
db|uart_top.(2).cnf
db|uart_top.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
switch_bus.vhd
d9723f594a48f46039dc452d9ae9d4b
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
bus_width
8
PARAMETER_SIGNED_DEC
USR
 constraint(din1)
7 downto 0
PARAMETER_STRING
USR
 constraint(din2)
7 downto 0
PARAMETER_STRING
USR
 constraint(dout)
7 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
switch_bus:U_BusSwitch
}
# end
# entity
switch
# storage
db|uart_top.(5).cnf
db|uart_top.(5).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
switch.vhd
6f7193c918c924092e48bd5e48c3134
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
switch:U_CounterClkSwitch
switch:U_SISwitch
switch:U_SRClkSwitch
switch:U_TXDSwitch
}
# end
# entity
detector
# storage
db|uart_top.(6).cnf
db|uart_top.(6).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
detector.vhd
fa3a6d2594b9f27d6227e821e496bc4
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# include_file {
UART_PACKAGE.vhd
cd565d23cbfc1d9645cf58155b3d65c4
}
# hierarchies {
detector:U_Detector
}
# end
# entity
parity_verifier
# storage
db|uart_top.(7).cnf
db|uart_top.(7).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
parity_verifier.vhd
271c5eb987c8f427138c584536cd49b0
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
data_length
8
PARAMETER_SIGNED_DEC
USR
parity_rule
NONE
PARAMETER_ENUM
USR
 constraint(source)
7 downto 0
PARAMETER_STRING
USR
}
# include_file {
UART_PACKAGE.vhd
cd565d23cbfc1d9645cf58155b3d65c4
}
# hierarchies {
parity_verifier:U_ParityVerifier
}
# end
# entity
shift_register
# storage
db|uart_top.(8).cnf
db|uart_top.(8).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
shift_register.vhd
5c4f51ae46f87b5843dd472dffc32d
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
total_bit
10
PARAMETER_SIGNED_DEC
USR
 constraint(regs)
9 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
shift_register:U_SR
}
# end
# entity
counter
# storage
db|uart_top.(4).cnf
db|uart_top.(4).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
counter.vhd
37ce64f2ec0129b6b6c14b6751b879
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
max_count
10
PARAMETER_SIGNED_DEC
USR
}
# hierarchies {
counter:U_Counter
}
# end
# entity
uart_core
# storage
db|uart_top.(3).cnf
db|uart_top.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
uart_core.vhd
552f6c2fb91fc1f5308a68dc6e916dd1
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
data_bit
8
PARAMETER_SIGNED_DEC
USR
total_bit
10
PARAMETER_SIGNED_DEC
USR
parity_rule
NONE
PARAMETER_ENUM
USR
 constraint(regs)
9 downto 0
PARAMETER_STRING
USR
 constraint(send_bus)
7 downto 0
PARAMETER_STRING
USR
 constraint(recv_bus)
7 downto 0
PARAMETER_STRING
USR
}
# include_file {
UART_PACKAGE.vhd
cd565d23cbfc1d9645cf58155b3d65c4
}
# hierarchies {
uart_core:U_Core
}
# end
# entity
baudrate_generator
# storage
db|uart_top.(9).cnf
db|uart_top.(9).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
baudrate_generator.vhd
f2d9492cbf324deca8563f2852a9dc
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
full_pulse_count
5208
PARAMETER_SIGNED_DEC
DEF
rise_pulse_count
2604
PARAMETER_SIGNED_DEC
DEF
}
# include_file {
UART_PACKAGE.vhd
cd565d23cbfc1d9645cf58155b3d65c4
}
# end
# entity
sld_signaltap
# storage
db|uart_top.(10).cnf
db|uart_top.(10).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|..|..|quartus|libraries|megafunctions|sld_signaltap.vhd
dfe652acee26b72b2fda5892aa5e58e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
671116800
PARAMETER_UNKNOWN
USR
sld_ip_version
5
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
22
PARAMETER_UNKNOWN
USR
sld_trigger_bits
22
PARAMETER_UNKNOWN
USR
sld_data_bit_cntr_bits
5
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
2274
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
38227
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
128
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
82
PARAMETER_UNKNOWN
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
0
PARAMETER_UNKNOWN
USR
}
# end
# entity
sld_ela_control
# storage
db|uart_top.(11).cnf
db|uart_top.(11).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|..|..|quartus|libraries|megafunctions|sld_ela_control.vhd
a345f87dcbc417967dccb34f3232b9b0
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
5
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_input_width
22
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
trigger_in_enabled
0
PARAMETER_SIGNED_DEC
USR
enable_clk_edge_def
0
PARAMETER_SIGNED_DEC
USR
enable_async_glitch
0
PARAMETER_SIGNED_DEC
USR
enable_sync_normal
1
PARAMETER_SIGNED_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
mem_address_bits
7
PARAMETER_SIGNED_DEC
USR
sample_depth
128
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
82
PARAMETER_SIGNED_DEC
USR
inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
 constraint(acq_trigger_in)
21 downto 0
PARAMETER_STRING
USR
 constraint(status)
3 downto 0
PARAMETER_STRING
USR
}
# end
# entity
lpm_shiftreg
# storage
db|uart_top.(12).cnf
db|uart_top.(12).cnf
# case_insensitive
# source_file
..|..|..|quartus|libraries|megafunctions|lpm_shiftreg.tdf
da15e606a442587da69cd6a7646c77c
6
# user_parameter {
LPM_WIDTH
16
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
shiftout
-1
3
shiftin
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
enable
-1
3
clock
-1
3
aclr
-1
3
load
-1
1
data9
-1
1
data8
-1
1
data7
-1
1
data6
-1
1
data5
-1
1
data4
-1
1
data3
-1
1
data2
-1
1
data15
-1
1
data14
-1
1
data13
-1
1
data12
-1
1
data11
-1
1
data10
-1
1
data1
-1
1
data0
-1
1
}
# include_file {
..|..|..|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
..|..|..|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
..|..|..|quartus|libraries|megafunctions|aglobal70.inc
6e323611d63cddcc66b682e7ab39d4b7
}
# end
# entity
sld_ela_basic_multi_level_trigger
# storage
db|uart_top.(13).cnf
db|uart_top.(13).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|..|..|quartus|libraries|megafunctions|sld_ela_control.vhd
a345f87dcbc417967dccb34f3232b9b0
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
5
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
data_bits
22
PARAMETER_SIGNED_DEC
USR
async_enabled
0
PARAMETER_SIGNED_DEC
USR
sync_enabled
1
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
82
PARAMETER_SIGNED_DEC
USR
inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
 constraint(data_in)
21 downto 0
PARAMETER_STRING
USR
 constraint(trigger_level_ena)
0 downto 0
PARAMETER_STRING
USR
 constraint(trigger_level_match_out)
0 downto 0
PARAMETER_STRING
USR
}
# end
# entity
lpm_shiftreg
# storage
db|uart_top.(14).cnf
db|uart_top.(14).cnf
# case_insensitive
# source_file
..|..|..|quartus|libraries|megafunctions|lpm_shiftreg.tdf
da15e606a442587da69cd6a7646c77c
6
# user_parameter {
LPM_WIDTH
66
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
shiftout
-1
3
shiftin
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q65
-1
3
q64
-1
3
q63
-1
3
q62
-1
3
q61
-1
3
q60
-1
3
q6
-1
3
q59
-1
3
q58
-1
3
q57
-1
3
q56
-1
3
q55
-1
3
q54
-1
3
q53
-1
3
q52
-1
3
q51
-1
3
q50
-1
3
q5
-1
3
q49
-1
3
q48
-1
3
q47
-1
3
q46
-1
3
q45
-1
3
q44
-1
3
q43
-1
3
q42
-1
3
q41
-1
3
q40
-1
3
q4
-1
3
q39
-1
3
q38
-1
3
q37
-1
3
q36
-1
3
q35
-1
3
q34
-1
3
q33
-1
3
q32
-1
3
q31
-1
3
q30
-1
3
q3
-1
3
q29
-1
3
q28
-1
3
q27
-1
3
q26
-1
3
q25
-1
3
q24
-1
3
q23
-1
3
q22
-1
3
q21
-1
3
q20
-1
3
q2