ad0820.hier_info

2008年北京市大学生电子设计竞赛程序源代码[测频率

|ad0820
rd <= adc:inst.rd
clk => clk_half:inst4.clk
clk => df:inst5.clk
clk => clk_dis:inst2.clk
clk => sinA:inst7.clk
clk => findmax:inst10.clk
clk => d_fre:inst8.clk
clk => onehz_clk:inst6.clk
INT => adc:inst.INT
data_in[0] => df:inst5.D[0]
data_in[1] => df:inst5.D[1]
data_in[2] => df:inst5.D[2]
data_in[3] => df:inst5.D[3]
data_in[4] => df:inst5.D[4]
data_in[5] => df:inst5.D[5]
data_in[6] => df:inst5.D[6]
data_in[7] => df:inst5.D[7]
dout[0] <= display:inst3.dout[0]
dout[1] <= display:inst3.dout[1]
dout[2] <= display:inst3.dout[2]
dout[3] <= display:inst3.dout[3]
dout[4] <= display:inst3.dout[4]
dout[5] <= display:inst3.dout[5]
dout[6] <= display:inst3.dout[6]
dout[7] <= display:inst3.dout[7]
fin => d_fre:inst8.D
key[0] => sinA:inst7.key[0]
key[1] => sinA:inst7.key[1]
key[2] => sinA:inst7.key[2]
key[3] => sinA:inst7.key[3]
key[4] => sinA:inst7.key[4]
key[5] => sinA:inst7.key[5]
key[6] => sinA:inst7.key[6]
key[7] => sinA:inst7.key[7]
key[8] => sinA:inst7.key[8]
key[9] => sinA:inst7.key[9]
key[10] => sinA:inst7.key[10]
key[11] => sinA:inst7.key[11]
scale[0] <= display:inst3.scale[0]
scale[1] <= display:inst3.scale[1]
scale[2] <= display:inst3.scale[2]
scale[3] <= display:inst3.scale[3]
scale[4] <= display:inst3.scale[4]
scale[5] <= display:inst3.scale[5]
scale[6] <= display:inst3.scale[6]
scale[7] <= display:inst3.scale[7]


|ad0820|adc:inst
clk => current_state~0.IN1
INT => Selector0.IN3
INT => next_state.st3.DATAB
data_in[0] => data_out[0]$latch.DATAIN
data_in[1] => data_out[1]$latch.DATAIN
data_in[2] => data_out[2]$latch.DATAIN
data_in[3] => data_out[3]$latch.DATAIN
data_in[4] => data_out[4]$latch.DATAIN
data_in[5] => data_out[5]$latch.DATAIN
data_in[6] => data_out[6]$latch.DATAIN
data_in[7] => data_out[7]$latch.DATAIN
mode <= <GND>
cs <= current_state.st0.DB_MAX_OUTPUT_PORT_TYPE
rd <= rd~0.DB_MAX_OUTPUT_PORT_TYPE
wr_rdy <= <GND>
data_out[0] <= data_out[0]$latch.DB_MAX_OUTPUT_PORT_TYPE
data_out[1] <= data_out[1]$latch.DB_MAX_OUTPUT_PORT_TYPE
data_out[2] <= data_out[2]$latch.DB_MAX_OUTPUT_PORT_TYPE
data_out[3] <= data_out[3]$latch.DB_MAX_OUTPUT_PORT_TYPE
data_out[4] <= data_out[4]$latch.DB_MAX_OUTPUT_PORT_TYPE
data_out[5] <= data_out[5]$latch.DB_MAX_OUTPUT_PORT_TYPE
data_out[6] <= data_out[6]$latch.DB_MAX_OUTPUT_PORT_TYPE
data_out[7] <= data_out[7]$latch.DB_MAX_OUTPUT_PORT_TYPE


|ad0820|clk_half:inst4
clk => clk_d.CLK
clk_out <= clk_d.DB_MAX_OUTPUT_PORT_TYPE


|ad0820|df:inst5
clk => sig_save[7].CLK
clk => sig_save[6].CLK
clk => sig_save[5].CLK
clk => sig_save[4].CLK
clk => sig_save[3].CLK
clk => sig_save[2].CLK
clk => sig_save[1].CLK
clk => sig_save[0].CLK
D[0] => sig_save[0].DATAIN
D[1] => sig_save[1].DATAIN
D[2] => sig_save[2].DATAIN
D[3] => sig_save[3].DATAIN
D[4] => sig_save[4].DATAIN
D[5] => sig_save[5].DATAIN
D[6] => sig_save[6].DATAIN
D[7] => sig_save[7].DATAIN
Q[0] <= sig_save[0].DB_MAX_OUTPUT_PORT_TYPE
Q[1] <= sig_save[1].DB_MAX_OUTPUT_PORT_TYPE
Q[2] <= sig_save[2].DB_MAX_OUTPUT_PORT_TYPE
Q[3] <= sig_save[3].DB_MAX_OUTPUT_PORT_TYPE
Q[4] <= sig_save[4].DB_MAX_OUTPUT_PORT_TYPE
Q[5] <= sig_save[5].DB_MAX_OUTPUT_PORT_TYPE
Q[6] <= sig_save[6].DB_MAX_OUTPUT_PORT_TYPE
Q[7] <= sig_save[7].DB_MAX_OUTPUT_PORT_TYPE


|ad0820|display:inst3
clk => clk_counter[8].CLK
clk => clk_counter[7].CLK
clk => clk_counter[6].CLK
clk => clk_counter[5].CLK
clk => clk_counter[4].CLK
clk => clk_counter[3].CLK
clk => clk_counter[2].CLK
clk => clk_counter[1].CLK
clk => clk_counter[0].CLK
clk => clk_d.CLK
number_a[0] => Mux4.IN0
number_a[1] => Mux3.IN0
number_a[2] => Mux2.IN0
number_a[3] => Mux1.IN0
number_a[4] => Mux0.IN0
number_b[0] => Mux4.IN1
number_b[1] => Mux3.IN1
number_b[2] => Mux2.IN1
number_b[3] => Mux1.IN1
number_b[4] => Mux0.IN1
number_c[0] => Mux4.IN2
number_c[1] => Mux3.IN2
number_c[2] => Mux2.IN2
number_c[3] => Mux1.IN2
number_c[4] => Mux0.IN2
number_d[0] => Mux4.IN3
number_d[1] => Mux3.IN3
number_d[2] => Mux2.IN3
number_d[3] => Mux1.IN3
number_d[4] => Mux0.IN3
number_e[0] => Mux4.IN4
number_e[1] => Mux3.IN4
number_e[2] => Mux2.IN4
number_e[3] => Mux1.IN4
number_e[4] => Mux0.IN4
number_f[0] => Mux4.IN5
number_f[1] => Mux3.IN5
number_f[2] => Mux2.IN5
number_f[3] => Mux1.IN5
number_f[4] => Mux0.IN5
number_g[0] => Mux4.IN6
number_g[1] => Mux3.IN6
number_g[2] => Mux2.IN6
number_g[3] => Mux1.IN6
number_g[4] => Mux0.IN6
number_h[0] => Mux4.IN7
number_h[1] => Mux3.IN7
number_h[2] => Mux2.IN7
number_h[3] => Mux1.IN7
number_h[4] => Mux0.IN7
scale[0] <= scale[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
scale[1] <= scale[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
scale[2] <= scale[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
scale[3] <= scale[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
scale[4] <= scale[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
scale[5] <= scale[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
scale[6] <= scale[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
scale[7] <= scale[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
dout[0] <= Mux20.DB_MAX_OUTPUT_PORT_TYPE
dout[1] <= Mux19.DB_MAX_OUTPUT_PORT_TYPE
dout[2] <= Mux18.DB_MAX_OUTPUT_PORT_TYPE
dout[3] <= Mux17.DB_MAX_OUTPUT_PORT_TYPE
dout[4] <= Mux16.DB_MAX_OUTPUT_PORT_TYPE
dout[5] <= Mux15.DB_MAX_OUTPUT_PORT_TYPE
dout[6] <= Mux14.DB_MAX_OUTPUT_PORT_TYPE
dout[7] <= Mux13.DB_MAX_OUTPUT_PORT_TYPE


|ad0820|clk_dis:inst2
clk => counter[5].CLK
clk => counter[4].CLK
clk => counter[3].CLK
clk => counter[2].CLK
clk => counter[1].CLK
clk => counter[0].CLK
clk => clk_d.CLK
clk_out <= clk_d.DB_MAX_OUTPUT_PORT_TYPE


|ad0820|Vtab:inst1
clk => tmph[3].CLK
clk => tmph[2].CLK
clk => tmph[1].CLK
clk => tmph[0].CLK
clk => tmpl[3].CLK
clk => tmpl[2].CLK
clk => tmpl[1].CLK
clk => tmpl[0].CLK
clk => t1[15].CLK
clk => t1[14].CLK
clk => t1[13].CLK
clk => t1[12].CLK
clk => t1[11].CLK
clk => t1[10].CLK
clk => t1[9].CLK
clk => t1[8].CLK
clk => t1[7].CLK
clk => t1[6].CLK
clk => t1[5].CLK
clk => t1[4].CLK
clk => t1[3].CLK
clk => t1[2].CLK
clk => t1[1].CLK
clk => t1[0].CLK
clk => t2[15].CLK
clk => t2[14].CLK
clk => t2[13].CLK
clk => t2[12].CLK
clk => t2[11].CLK
clk => t2[10].CLK
clk => t2[9].CLK
clk => t2[8].CLK
clk => t2[7].CLK
clk => t2[6].CLK
clk => t2[5].CLK
clk => t2[4].CLK
clk => t2[3].CLK
clk => t2[2].CLK
clk => t2[1].CLK
clk => t2[0].CLK
datain[0] => tmpl[0].DATAIN
datain[1] => tmpl[1].DATAIN
datain[2] => tmpl[2].DATAIN
datain[3] => tmpl[3].DATAIN
datain[4] => tmph[0].DATAIN
datain[5] => tmph[1].DATAIN
datain[6] => tmph[2].DATAIN
datain[7] => tmph[3].DATAIN
dis_a[0] <= addbcd:ad1.bcd[12]
dis_a[1] <= addbcd:ad1.bcd[13]
dis_a[2] <= addbcd:ad1.bcd[14]
dis_a[3] <= addbcd:ad1.bcd[15]
dis_a[4] <= <GND>
dis_b[0] <= addbcd:ad1.bcd[8]
dis_b[1] <= addbcd:ad1.bcd[9]
dis_b[2] <= addbcd:ad1.bcd[10]
dis_b[3] <= addbcd:ad1.bcd[11]
dis_b[4] <= <VCC>
dis_c[0] <= addbcd:ad1.bcd[4]
dis_c[1] <= addbcd:ad1.bcd[5]
dis_c[2] <= addbcd:ad1.bcd[6]
dis_c[3] <= addbcd:ad1.bcd[7]
dis_c[4] <= <GND>
dis_d[0] <= addbcd:ad1.bcd[0]
dis_d[1] <= addbcd:ad1.bcd[1]
dis_d[2] <= addbcd:ad1.bcd[2]
dis_d[3] <= addbcd:ad1.bcd[3]
dis_d[4] <= <GND>


|ad0820|Vtab:inst1|addbcd:ad1
bcd1[0] => adder:A1.x[0]
bcd1[1] => adder:A1.x[1]
bcd1[2] => adder:A1.x[2]
bcd1[3] => adder:A1.x[3]
bcd1[4] => adder:A1.x[4]
bcd1[5] => adder:A1.x[5]
bcd1[6] => adder:A1.x[6]
bcd1[7] => adder:A1.x[7]
bcd1[8] => adder:A1.x[8]
bcd1[9] => adder:A1.x[9]
bcd1[10] => adder:A1.x[10]
bcd1[11] => adder:A1.x[11]
bcd1[12] => adder:A1.x[12]
bcd1[13] => adder:A1.x[13]
bcd1[14] => adder:A1.x[14]
bcd1[15] => adder:A1.x[15]
bcd2[0] => adder:A1.y[0]
bcd2[1] => adder:A1.y[1]
bcd2[2] => adder:A1.y[2]
bcd2[3] => adder:A1.y[3]
bcd2[4] => adder:A1.y[4]
bcd2[5] => adder:A1.y[5]
bcd2[6] => adder:A1.y[6]
bcd2[7] => adder:A1.y[7]
bcd2[8] => adder:A1.y[8]
bcd2[9] => adder:A1.y[9]
bcd2[10] => adder:A1.y[10]
bcd2[11] => adder:A1.y[11]
bcd2[12] => adder:A1.y[12]
bcd2[13] => adder:A1.y[13]
bcd2[14] => adder:A1.y[14]
bcd2[15] => adder:A1.y[15]
bcd[0] <= adder:A1.sum[0]
bcd[1] <= adder:A1.sum[1]
bcd[2] <= adder:A1.sum[2]
bcd[3] <= adder:A1.sum[3]
bcd[4] <= adder:A1.sum[4]
bcd[5] <= adder:A1.sum[5]
bcd[6] <= adder:A1.sum[6]
bcd[7] <= adder:A1.sum[7]
bcd[8] <= adder:A1.sum[8]
bcd[9] <= adder:A1.sum[9]
bcd[10] <= adder:A1.sum[10]
bcd[11] <= adder:A1.sum[11]
bcd[12] <= adder:A1.sum[12]
bcd[13] <= adder:A1.sum[13]
bcd[14] <= adder:A1.sum[14]
bcd[15] <= adder:A1.sum[15]


|ad0820|Vtab:inst1|addbcd:ad1|adder:A1
x[0] => bcdadder:U1.a[0]
x[1] => bcdadder:U1.a[1]
x[2] => bcdadder:U1.a[2]
x[3] => bcdadder:U1.a[3]
x[4] => bcdadder:U2.a[0]
x[5] => bcdadder:U2.a[1]
x[6] => bcdadder:U2.a[2]
x[7] => bcdadder:U2.a[3]
x[8] => bcdadder:U3.a[0]
x[9] => bcdadder:U3.a[1]
x[10] => bcdadder:U3.a[2]
x[11] => bcdadder:U3.a[3]
x[12] => bcdadder:U4.a[0]
x[13] => bcdadder:U4.a[1]
x[14] => bcdadder:U4.a[2]
x[15] => bcdadder:U4.a[3]
y[0] => bcdadder:U1.b[0]
y[1] => bcdadder:U1.b[1]
y[2] => bcdadder:U1.b[2]
y[3] => bcdadder:U1.b[3]
y[4] => bcdadder:U2.b[0]
y[5] => bcdadder:U2.b[1]
y[6] => bcdadder:U2.b[2]
y[7] => bcdadder:U2.b[3]
y[8] => bcdadder:U3.b[0]
y[9] => bcdadder:U3.b[1]
y[10] => bcdadder:U3.b[2]
y[11] => bcdadder:U3.b[3]
y[12] => bcdadder:U4.b[0]
y[13] => bcdadder:U4.b[1]
y[14] => bcdadder:U4.b[2]
y[15] => bcdadder:U4.b[3]
cin => bcdadder:U1.ci
sum[0] <= bcdadder:U1.result[0]
sum[1] <= bcdadder:U1.result[1]
sum[2] <= bcdadder:U1.result[2]
sum[3] <= bcdadder:U1.result[3]
sum[4] <= bcdadder:U2.result[0]
sum[5] <= bcdadder:U2.result[1]
sum[6] <= bcdadder:U2.result[2]
sum[7] <= bcdadder:U2.result[3]
sum[8] <= bcdadder:U3.result[0]
sum[9] <= bcdadder:U3.result[1]
sum[10] <= bcdadder:U3.result[2]
sum[11] <= bcdadder:U3.result[3]
sum[12] <= bcdadder:U4.result[0]
sum[13] <= bcdadder:U4.result[1]