cpld_mpu1.vm

工程中使用的一段资源管理vhdl程序,有简单的分频代码等

//
// Written by Synplify
// Synplify 8.4.0.p, Build 075R.
// Wed Feb 18 11:14:01 2009
//
// Source file index table:
// Object locations will have the form <file>:<line>
// file 0 "noname"
// file 1 "\d:\isptools6_0\synpbase\lib\vhd\std.vhd "
// file 2 "\e:\raflfile\sd\cpld\footvhdl.vhd "
// file 3 "\d:\isptools6_0\synpbase\lib\vhd\std1164.vhd "
// file 4 "\d:\isptools6_0\synpbase\lib\vhd\unsigned.vhd "
// file 5 "\d:\isptools6_0\synpbase\lib\vhd\arith.vhd "

`timescale 100 ps/100 ps
module OBUF (
  O,
  I0
);
output O ;
input I0 ;
wire O ;
wire I0 ;
wire VCC ;
wire GND ;
  assign #(1)  O = I0;
  assign VCC = 1'b1;
  assign GND = 1'b0;
endmodule /* OBUF */

module CPLD_MPU1 (
  BOE1,
  BOE2,
  BOE3,
  BOE4,
  BOE5,
  BOE6,
  BOE7,
  BOE8,
  BOE9,
  BOE10,
  BOE11,
  BOE12,
  BOE13,
  BOE14,
  BOE15,
  BOE16,
  RESET
);
output BOE1 ;
output BOE2 ;
output BOE3 ;
output BOE4 ;
output BOE5 ;
output BOE6 ;
output BOE7 ;
output BOE8 ;
output BOE9 ;
output BOE10 ;
output BOE11 ;
output BOE12 ;
output BOE13 ;
output BOE14 ;
output BOE15 ;
output BOE16 ;
input RESET ;
wire BOE1 ;
wire BOE2 ;
wire BOE3 ;
wire BOE4 ;
wire BOE5 ;
wire BOE6 ;
wire BOE7 ;
wire BOE8 ;
wire BOE9 ;
wire BOE10 ;
wire BOE11 ;
wire BOE12 ;
wire BOE13 ;
wire BOE14 ;
wire BOE15 ;
wire BOE16 ;
wire RESET ;
wire GND ;
wire VCC ;
//@1:1
  assign VCC = 1'b1;
//@1:1
  assign GND = 1'b0;
  OBUF BOE1_cZ (
	.O(BOE1),
	.I0(VCC)
);
  OBUF BOE2_cZ (
	.O(BOE2),
	.I0(VCC)
);
  OBUF BOE3_cZ (
	.O(BOE3),
	.I0(VCC)
);
  OBUF BOE4_cZ (
	.O(BOE4),
	.I0(VCC)
);
  OBUF BOE5_cZ (
	.O(BOE5),
	.I0(VCC)
);
  OBUF BOE6_cZ (
	.O(BOE6),
	.I0(VCC)
);
  OBUF BOE7_cZ (
	.O(BOE7),
	.I0(VCC)
);
  OBUF BOE8_cZ (
	.O(BOE8),
	.I0(GND)
);
  OBUF BOE9_cZ (
	.O(BOE9),
	.I0(VCC)
);
  OBUF BOE10_cZ (
	.O(BOE10),
	.I0(VCC)
);
  OBUF BOE11_cZ (
	.O(BOE11),
	.I0(VCC)
);
  OBUF BOE12_cZ (
	.O(BOE12),
	.I0(VCC)
);
  OBUF BOE13_cZ (
	.O(BOE13),
	.I0(VCC)
);
  OBUF BOE14_cZ (
	.O(BOE14),
	.I0(VCC)
);
  OBUF BOE15_cZ (
	.O(BOE15),
	.I0(VCC)
);
  OBUF BOE16_cZ (
	.O(BOE16),
	.I0(VCC)
);
endmodule /* CPLD_MPU1 */