cpld_mpu1.eq0

工程中使用的一段资源管理vhdl程序,有简单的分频代码等

EDIF2BLIF version IspLever 1.0  Linked Equations File
Copyright(C), 1992-2006, Lattice Semiconductor Corp.
All Rights Reserved.

Design cpld_mpu1 created Tue Feb 17 15:28:07 2009


 P-Terms   Fan-in  Fan-out  Type  Name (attributes)
---------  ------  -------  ----  -----------------
   1/1        1        1    Pin   BOE1 
   1/1        1        1    Pin   BOE2 
   1/1        1        1    Pin   BOE3 
   1/1        1        1    Pin   BOE4 
   1/1        1        1    Pin   BOE5 
   1/1        1        1    Pin   BOE6 
   1/1        1        1    Pin   BOE7 
   1/1        1        1    Pin   BOE8 
   1/1        1        1    Pin   BOE9 
   1/1        1        1    Pin   BOE10 
   1/1        1        1    Pin   BOE11 
   1/1        1        1    Pin   BOE12 
   1/1        1        1    Pin   BOE13 
   1/1        1        1    Pin   BOE14 
   1/1        1        1    Pin   BOE15 
   1/1        1        1    Pin   BOE16 
   0          0        1    Node  gnd_n_n 
   1          0        1    Node  vcc_n_n 
=========
  17/16         Best P-Term Total: 17
                       Total Pins: 17
                      Total Nodes: 2
            Average P-Term/Output: 0


Equations:

BOE1 = (gnd_n_n);

BOE2 = (vcc_n_n);

BOE3 = (vcc_n_n);

BOE4 = (vcc_n_n);

BOE5 = (vcc_n_n);

BOE6 = (vcc_n_n);

BOE7 = (vcc_n_n);

BOE8 = (vcc_n_n);

BOE9 = (vcc_n_n);

BOE10 = (vcc_n_n);

BOE11 = (vcc_n_n);

BOE12 = (vcc_n_n);

BOE13 = (vcc_n_n);

BOE14 = (vcc_n_n);

BOE15 = (vcc_n_n);

BOE16 = (vcc_n_n);

gnd_n_n = (0);

vcc_n_n = (1);


Reverse-Polarity Equations:

!BOE1 = (!gnd_n_n);

!BOE2 = (!vcc_n_n);

!BOE3 = (!vcc_n_n);

!BOE4 = (!vcc_n_n);

!BOE5 = (!vcc_n_n);

!BOE6 = (!vcc_n_n);

!BOE7 = (!vcc_n_n);

!BOE8 = (!vcc_n_n);

!BOE9 = (!vcc_n_n);

!BOE10 = (!vcc_n_n);

!BOE11 = (!vcc_n_n);

!BOE12 = (!vcc_n_n);

!BOE13 = (!vcc_n_n);

!BOE14 = (!vcc_n_n);

!BOE15 = (!vcc_n_n);

!BOE16 = (!vcc_n_n);