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📄 hbf_dspblocks.mdl

📁 半带插值滤波器设计、综合、仿真和硬件测试
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	      mask_cst		      "0"
	      LocPin		      "any"
	      cst		      "0"
	      modulename	      "Input19"
	      nSgCpl		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Input2"
	      Description	      "Sign Binary Fractionnal"
	      Ports		      [1, 1]
	      Position		      [105, 107, 170, 123]
	      SourceBlock	      "bus_alteradspbuilder/Input"
	      SourceType	      "AltBus AlteraBlockSet"
	      sgn		      "Signed Integer"
	      nodetype		      "Input Port"
	      bwl		      "18"
	      bwr		      "0"
	      sat		      off
	      rnd		      off
	      bp		      off
	      mask_cst		      "0"
	      LocPin		      "any"
	      cst		      "0"
	      modulename	      "Input2"
	      nSgCpl		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Input3"
	      Description	      "Sign Binary Fractionnal"
	      Ports		      [1, 1]
	      Position		      [105, 137, 170, 153]
	      SourceBlock	      "bus_alteradspbuilder/Input"
	      SourceType	      "AltBus AlteraBlockSet"
	      sgn		      "Signed Integer"
	      nodetype		      "Input Port"
	      bwl		      "18"
	      bwr		      "0"
	      sat		      off
	      rnd		      off
	      bp		      off
	      mask_cst		      "0"
	      LocPin		      "any"
	      cst		      "0"
	      modulename	      "Input3"
	      nSgCpl		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Input4"
	      Description	      "Sign Binary Fractionnal"
	      Ports		      [1, 1]
	      Position		      [105, 167, 170, 183]
	      SourceBlock	      "bus_alteradspbuilder/Input"
	      SourceType	      "AltBus AlteraBlockSet"
	      sgn		      "Signed Integer"
	      nodetype		      "Input Port"
	      bwl		      "18"
	      bwr		      "0"
	      sat		      off
	      rnd		      off
	      bp		      off
	      mask_cst		      "0"
	      LocPin		      "any"
	      cst		      "0"
	      modulename	      "Input4"
	      nSgCpl		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Input5"
	      Description	      "Sign Binary Fractionnal"
	      Ports		      [1, 1]
	      Position		      [105, 197, 170, 213]
	      SourceBlock	      "bus_alteradspbuilder/Input"
	      SourceType	      "AltBus AlteraBlockSet"
	      sgn		      "Signed Integer"
	      nodetype		      "Input Port"
	      bwl		      "18"
	      bwr		      "0"
	      sat		      off
	      rnd		      off
	      bp		      off
	      mask_cst		      "0"
	      LocPin		      "any"
	      cst		      "0"
	      modulename	      "Input5"
	      nSgCpl		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Input6"
	      Description	      "Sign Binary Fractionnal"
	      Ports		      [1, 1]
	      Position		      [105, 227, 170, 243]
	      SourceBlock	      "bus_alteradspbuilder/Input"
	      SourceType	      "AltBus AlteraBlockSet"
	      sgn		      "Signed Integer"
	      nodetype		      "Input Port"
	      bwl		      "18"
	      bwr		      "0"
	      sat		      off
	      rnd		      off
	      bp		      off
	      mask_cst		      "0"
	      LocPin		      "any"
	      cst		      "0"
	      modulename	      "Input6"
	      nSgCpl		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Input7"
	      Description	      "Sign Binary Fractionnal"
	      Ports		      [1, 1]
	      Position		      [105, 257, 170, 273]
	      SourceBlock	      "bus_alteradspbuilder/Input"
	      SourceType	      "AltBus AlteraBlockSet"
	      sgn		      "Signed Integer"
	      nodetype		      "Input Port"
	      bwl		      "18"
	      bwr		      "0"
	      sat		      off
	      rnd		      off
	      bp		      off
	      mask_cst		      "0"
	      LocPin		      "any"
	      cst		      "0"
	      modulename	      "Input7"
	      nSgCpl		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Input8"
	      Description	      "Sign Binary Fractionnal"
	      Ports		      [1, 1]
	      Position		      [105, 287, 170, 303]
	      SourceBlock	      "bus_alteradspbuilder/Input"
	      SourceType	      "AltBus AlteraBlockSet"
	      sgn		      "Signed Integer"
	      nodetype		      "Input Port"
	      bwl		      "18"
	      bwr		      "0"
	      sat		      off
	      rnd		      off
	      bp		      off
	      mask_cst		      "0"
	      LocPin		      "any"
	      cst		      "0"
	      modulename	      "Input8"
	      nSgCpl		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Input9"
	      Description	      "Sign Binary Fractionnal"
	      Ports		      [1, 1]
	      Position		      [105, 317, 170, 333]
	      SourceBlock	      "bus_alteradspbuilder/Input"
	      SourceType	      "AltBus AlteraBlockSet"
	      sgn		      "Signed Integer"
	      nodetype		      "Input Port"
	      bwl		      "18"
	      bwr		      "0"
	      sat		      off
	      rnd		      off
	      bp		      off
	      mask_cst		      "0"
	      LocPin		      "any"
	      cst		      "0"
	      modulename	      "Input9"
	      nSgCpl		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Multiply Add"
	      Ports		      [8, 1]
	      Position		      [570, 57, 760, 293]
	      SourceBlock	      "arithm_alteradspbuilder/Multiply Add"
	      SourceType	      "AltMultAdd Altera BlockSet"
	      depth		      "4"
	      BusType		      "Signed Integer"
	      bwl		      "18"
	      bwr		      "0"
	      direction		      "Add Add"
	      pipeline		      "Inputs Multiplier and Adder"
	      clken		      off
	      eab		      on
	      cst		      off
	      Constantvalues	      "[13 -2 0 3]"
	      gain		      "[13,-2,0,3]"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Multiply Add1"
	      Ports		      [8, 1]
	      Position		      [570, 297, 760, 533]
	      SourceBlock	      "arithm_alteradspbuilder/Multiply Add"
	      SourceType	      "AltMultAdd Altera BlockSet"
	      depth		      "4"
	      BusType		      "Signed Integer"
	      bwl		      "18"
	      bwr		      "0"
	      direction		      "Add Add"
	      pipeline		      "Inputs Multiplier and Adder"
	      clken		      off
	      eab		      on
	      cst		      off
	      Constantvalues	      "[13 -2 0 3]"
	      gain		      "[13,-2,0,3]"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Multiply Add2"
	      Ports		      [4, 1]
	      Position		      [570, 536, 760, 654]
	      SourceBlock	      "arithm_alteradspbuilder/Multiply Add"
	      SourceType	      "AltMultAdd Altera BlockSet"
	      depth		      "2"
	      BusType		      "Signed Integer"
	      bwl		      "18"
	      bwr		      "0"
	      direction		      "Add Add"
	      pipeline		      "Inputs Multiplier and Adder"
	      clken		      off
	      eab		      on
	      cst		      off
	      Constantvalues	      "[13 -2 0 3]"
	      gain		      "[13,-2,0.0,0.0]"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "NOT"
	      Ports		      [1, 1]
	      Position		      [1125, 492, 1165, 508]
	      SourceBlock	      "gate_alteradspbuilder/NOT"
	      SourceType	      "LogiBit AlteraBlockSet"
	      Operator		      "NOT"
	      Inputs		      "2"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Output"
	      Description	      "Sign Binary Fractionnal"
	      Ports		      [1, 1]
	      Position		      [1395, 497, 1460, 513]
	      SourceBlock	      "bus_alteradspbuilder/Output"
	      SourceType	      "AltBus AlteraBlockSet"
	      sgn		      "Signed Integer"
	      nodetype		      "Output Port"
	      bwl		      "38"
	      bwr		      "0"
	      sat		      off
	      rnd		      off
	      bp		      off
	      mask_cst		      "0"
	      LocPin		      "any"
	      cst		      "0"
	      modulename	      "Output"
	      nSgCpl		      "0"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Pipelined Adder"
	      Ports		      [6, 2]
	      Position		      [1260, 407, 1345, 533]
	      SourceBlock	      "arithm_alteradspbuilder/Pipelined Adder"
	      SourceType	      "HDLEntity AlteraBlockSet"
	      BusType		      "Signed Integer"
	      bwl		      "38"
	      bwr		      "0"
	      pipeline		      "1"
	      AddSubDirection	      "ADD"
	      UseControlInputs	      on
	      HDLInputPortsMappingAltera "dataa.38.0.s,datab.38.0.s,cin.1.0.b,"
"add_sub.1.0.b,clken.1.0.b"
	      HDLOutputPortsMappingAltera "cout.1.0.b,result.38.0.s"
	      HDLImplicitPortsMappingAltera "clock.clock, 6.sclror"
	      HDLParameterMappingAltera	"width.38.positive,pipeline.1.natural,"
"IsUnsigned.0.natural"
	      HDLLibraryInformationAltera "library dspbuilder;use dspbuilder.d"
"spbuilderblock.all;"
	      HDLComponentNameAltera  "sLpmAddSub"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Pipelined Adder1"
	      Ports		      [2, 1]
	      Position		      [900, 377, 955, 428]
	      SourceBlock	      "arithm_alteradspbuilder/Pipelined Adder"
	      SourceType	      "HDLEntity AlteraBlockSet"
	      BusType		      "Signed Integer"
	      bwl		      "38"
	      bwr		      "0"
	      pipeline		      "2"
	      AddSubDirection	      "ADD"
	      UseControlInputs	      off
	      HDLInputPortsMappingAltera "dataa.38.0.s,datab.38.0.s"
	      HDLOutputPortsMappingAltera "result.38.0.s"
	      HDLImplicitPortsMappingAltera "clock.clock,clken.VCC,sclr.sclr, "
"cin.GND, add_sub.VCC"
	      HDLParameterMappingAltera	"width.38.positive,pipeline.2.natural,"
"IsUnsigned.0.natural"
	      HDLLibraryInformationAltera "library dspbuilder;use dspbuilder.d"
"spbuilderblock.all;"
	      HDLComponentNameAltera  "sLpmAddSub"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Pipelined Adder2"
	      Ports		      [2, 1]
	      Position		      [995, 392, 1050, 443]
	      SourceBlock	      "arithm_alteradspbuilder/Pipelined Adder"
	      SourceType	      "HDLEntity AlteraBlockSet"
	      BusType		      "Signed Integer"
	      bwl		      "38"
	      bwr		      "0"
	      pipeline		      "2"
	      AddSubDirection	      "ADD"
	      UseControlInputs	      off
	      HDLInputPortsMappingAltera "dataa.38.0.s,datab.38.0.s"
	      HDLOutputPortsMappingAltera "result.38.0.s"
	      HDLImplicitPortsMappingAltera "clock.clock,clken.VCC,sclr.sclr, "
"cin.GND, add_sub.VCC"
	      HDLParameterMappingAltera	"width.38.positive,pipeline.2.natural,"
"IsUnsigned.0.natural"
	      HDLLibraryInformationAltera "library dspbuilder;use dspbuilder.d"
"spbuilderblock.all;"
	      HDLComponentNameAltera  "sLpmAddSub"
	    }
	    Block {
	      BlockType		      SubSystem
	      Name		      "TDM_Control"
	      Ports		      [21, 20]
	      Position		      [305, 34, 500, 676]
	      ForegroundColor	      "blue"
	      AncestorBlock	      "ALTELINK/AltLab/HDL SubSystem"
	      TreatAsAtomicUnit	      off
	      MinAlgLoopOccurrences   off
	      RTWSystemCode	      "Auto"
	      MaskType		      "SubSystem AlteraBlockSet"
	      MaskSelfModifiable      on
	      MaskIconFrame	      on
	      MaskIconOpaque	      on
	      MaskIconRotate	      "none"
	      MaskIconUnits	      "autoscale"
	      System {
		Name			"TDM_Control"
		Location		[77, 280, 953, 910]
		Open			off
		ModelBrowserVisibility	off
		ModelBrowserWidth	200
		ScreenColor		"white"
		PaperOrientation	"landscape"
		PaperPositionMode	"auto"
		PaperType		"usletter"
		PaperUnits		"inches"
		ZoomFactor		"88"
		Block {
		  BlockType		  Inport
		  Name			  "x1[17:0]"
		  Position		  [40, 38, 70, 52]
		  ForegroundColor	  "blue"
		  Port			  "1"
		  IconDisplay		  "Port number"
		  LatchInput		  off
		}
		Block {
		  BlockType		  Inport
		  Name			  "x2[17:0]"
		  Position		  [40, 68, 70, 82]
		  ForegroundColor	  "blue"
		  Port			  "2"
		  IconDisplay		  "Port number"
		  LatchInput		  off
		}
		Block {
		  BlockType		  Inport
		  Name			  "x3[17:0]"
		  Position		  [40, 98, 70, 112]
		  ForegroundColor	  "blue"
		  Port			  "3"
		  IconDisplay		  "Port number"
		  LatchInput		  off
		}
		Block {
		  BlockType		  Inport
		  Name			  "x4[17:0]"
		  Position		  [40, 128, 70, 142]
		  ForegroundColor	  "blue"
		  Port			  "4"
		  IconDisplay		  "Port number"
		  LatchInput		  off
		}
		Block {
		  BlockType		  Inport
		  Name			  "x5[17:0]"
		  Position		  [40, 158, 70, 172]
		  ForegroundColor	  "blue"
		  Port			  "5"
		  IconDisplay		  "Port number"
		  LatchInput		  off
		}
		Block {
		  BlockType		  Inport
		  Name			  "x6[17:0]"
		  Position		  [40, 188, 70, 202]
		  ForegroundColor	  "blue"
		  Port			  "6"
		  IconDisplay		  "Port number"
		  LatchInput		  off
		}
		Block {
		  BlockType		  Inport
		  Name			  "x7[17:0]"
		  Position		  [40, 218, 70, 232]
		  ForegroundColor	  "blue"
		  Port			  "7"
		  IconDisplay		  "Port number"
		  LatchInput		  off
		}
		Block {
		  BlockType		  Inport
		  Name			  "x8[17:0]"
		  Position		  [40, 248, 70, 262]
		  ForegroundColor	  "blue"
		  Port			  "8"
		  IconDisplay		  "Port number"
		  LatchInput		  off
		}
		Block {
		  BlockType		  Inport
		  Name			  "x9[17:0]"
		  Position		  [40, 278, 70, 292]
		  ForegroundColor	  "blue"
		  Port			  "9"
		  IconDisplay		  "Port number"
		  LatchInput		  off
		}
		Block {
		  BlockType		  Inport
		  Name			  "x10[17:0]"
		  Position		  [40, 308, 70, 322]
		  ForegroundColor	  "blue"
		  Port			  "10"
		  IconDisplay		  "Port number"
		  LatchInput		  off
		}
		Block {
		  BlockType		  Inport
		  Name			  "x11[17:0]"
		  Position		  [40, 338, 70, 352]

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