pro3.map.eqn

VHDL语言编写的 SPI总线控制器。。

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--C1_q[7] is sipo:inst1|q[7]
--operation mode is normal

C1_q[7]_lut_out = C1_q[6];
C1_q[7] = DFFEAS(C1_q[7]_lut_out, !clk, VCC, , , , , , );


--C1_q[6] is sipo:inst1|q[6]
--operation mode is normal

C1_q[6]_lut_out = C1_q[5];
C1_q[6] = DFFEAS(C1_q[6]_lut_out, !clk, VCC, , , , , , );


--C1_q[5] is sipo:inst1|q[5]
--operation mode is normal

C1_q[5]_lut_out = C1_q[4];
C1_q[5] = DFFEAS(C1_q[5]_lut_out, !clk, VCC, , , , , , );


--C1_q[4] is sipo:inst1|q[4]
--operation mode is normal

C1_q[4]_lut_out = C1_q[3];
C1_q[4] = DFFEAS(C1_q[4]_lut_out, !clk, VCC, , , , , , );


--C1_q[3] is sipo:inst1|q[3]
--operation mode is normal

C1_q[3]_lut_out = C1_q[2];
C1_q[3] = DFFEAS(C1_q[3]_lut_out, !clk, VCC, , , , , , );


--C1_q[2] is sipo:inst1|q[2]
--operation mode is normal

C1_q[2]_lut_out = C1_q[1];
C1_q[2] = DFFEAS(C1_q[2]_lut_out, !clk, VCC, , , , , , );


--C1_q[1] is sipo:inst1|q[1]
--operation mode is normal

C1_q[1]_lut_out = C1_q[0];
C1_q[1] = DFFEAS(C1_q[1]_lut_out, !clk, VCC, , , , , , );


--C1_q[0] is sipo:inst1|q[0]
--operation mode is normal

C1_q[0]_lut_out = miso;
C1_q[0] = DFFEAS(C1_q[0]_lut_out, !clk, VCC, , , , , , );


--B1_data_out is sopi:inst|data_out
--operation mode is normal

B1_data_out_lut_out = B1_q[7];
B1_data_out = DFFEAS(B1_data_out_lut_out, clk, load, , , , , , );


--B1_q[7] is sopi:inst|q[7]
--operation mode is normal

B1_q[7]_lut_out = B1_q[6];
B1_q[7] = DFFEAS(B1_q[7]_lut_out, clk, VCC, , , data_in[7], !load, , );


--B1_q[6] is sopi:inst|q[6]
--operation mode is normal

B1_q[6]_lut_out = B1_q[5];
B1_q[6] = DFFEAS(B1_q[6]_lut_out, clk, VCC, , , data_in[6], !load, , );


--B1_q[5] is sopi:inst|q[5]
--operation mode is normal

B1_q[5]_lut_out = B1_q[4];
B1_q[5] = DFFEAS(B1_q[5]_lut_out, clk, VCC, , , data_in[5], !load, , );


--B1_q[4] is sopi:inst|q[4]
--operation mode is normal

B1_q[4]_lut_out = B1_q[3];
B1_q[4] = DFFEAS(B1_q[4]_lut_out, clk, VCC, , , data_in[4], !load, , );


--B1_q[3] is sopi:inst|q[3]
--operation mode is normal

B1_q[3]_lut_out = B1_q[2];
B1_q[3] = DFFEAS(B1_q[3]_lut_out, clk, VCC, , , data_in[3], !load, , );


--B1_q[2] is sopi:inst|q[2]
--operation mode is normal

B1_q[2]_lut_out = B1_q[1];
B1_q[2] = DFFEAS(B1_q[2]_lut_out, clk, VCC, , , data_in[2], !load, , );


--B1_q[1] is sopi:inst|q[1]
--operation mode is normal

B1_q[1]_lut_out = B1_q[0];
B1_q[1] = DFFEAS(B1_q[1]_lut_out, clk, VCC, , , data_in[1], !load, , );


--B1_q[0] is sopi:inst|q[0]
--operation mode is normal

B1_q[0] = load & (B1_q[0]) # !load & data_in[0];


--ssl is ssl
--operation mode is input

ssl = INPUT();


--clk is clk
--operation mode is input

clk = INPUT();


--miso is miso
--operation mode is input

miso = INPUT();


--load is load
--operation mode is input

load = INPUT();


--data_in[7] is data_in[7]
--operation mode is input

data_in[7] = INPUT();


--data_in[6] is data_in[6]
--operation mode is input

data_in[6] = INPUT();


--data_in[5] is data_in[5]
--operation mode is input

data_in[5] = INPUT();


--data_in[4] is data_in[4]
--operation mode is input

data_in[4] = INPUT();


--data_in[3] is data_in[3]
--operation mode is input

data_in[3] = INPUT();


--data_in[2] is data_in[2]
--operation mode is input

data_in[2] = INPUT();


--data_in[1] is data_in[1]
--operation mode is input

data_in[1] = INPUT();


--data_in[0] is data_in[0]
--operation mode is input

data_in[0] = INPUT();


--mosi is mosi
--operation mode is output

mosi_tri_out = TRI(B1_data_out, ssl);
mosi = OUTPUT(mosi_tri_out);


--d_out[7] is d_out[7]
--operation mode is output

d_out[7] = OUTPUT(C1_q[7]);


--d_out[6] is d_out[6]
--operation mode is output

d_out[6] = OUTPUT(C1_q[6]);


--d_out[5] is d_out[5]
--operation mode is output

d_out[5] = OUTPUT(C1_q[5]);


--d_out[4] is d_out[4]
--operation mode is output

d_out[4] = OUTPUT(C1_q[4]);


--d_out[3] is d_out[3]
--operation mode is output

d_out[3] = OUTPUT(C1_q[3]);


--d_out[2] is d_out[2]
--operation mode is output

d_out[2] = OUTPUT(C1_q[2]);


--d_out[1] is d_out[1]
--operation mode is output

d_out[1] = OUTPUT(C1_q[1]);


--d_out[0] is d_out[0]
--operation mode is output

d_out[0] = OUTPUT(C1_q[0]);