pro3.sim.vwf

来自「VHDL语言编写的 SPI总线控制器。。」· VWF 代码 · 共 794 行

VWF
794 行
字号 
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/

/*
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/

HEADER
{
	VERSION = 1;
	TIME_UNIT = ns;
	SIMULATION_TIME = 1000.0;
	GRID_PHASE = 0.0;
	GRID_PERIOD = 10.0;
	GRID_DUTY_CYCLE = 50;
}

SIGNAL("clk")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("load")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("miso")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("mosi")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("ssl")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("d_out")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 8;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("d_out[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "d_out";
}

SIGNAL("d_out[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "d_out";
}

SIGNAL("d_out[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "d_out";
}

SIGNAL("d_out[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "d_out";
}

SIGNAL("d_out[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "d_out";
}

SIGNAL("d_out[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "d_out";
}

SIGNAL("d_out[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "d_out";
}

SIGNAL("d_out[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "d_out";
}

SIGNAL("data_in")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 8;
	LSB_INDEX = 0;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("data_in[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "data_in";
}

SIGNAL("data_in[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "data_in";
}

SIGNAL("data_in[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "data_in";
}

SIGNAL("data_in[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "data_in";
}

SIGNAL("data_in[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "data_in";
}

SIGNAL("data_in[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "data_in";
}

SIGNAL("data_in[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "data_in";
}

SIGNAL("data_in[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "data_in";
}

TRANSITION_LIST("clk")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 100;
			LEVEL 0 FOR 5.0;
			LEVEL 1 FOR 5.0;
		}
	}
}

TRANSITION_LIST("load")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 5;
			LEVEL 0 FOR 90.0;
			LEVEL 1 FOR 90.0;
		}
		LEVEL 0 FOR 90.0;
		LEVEL 1 FOR 10.0;
	}
}

TRANSITION_LIST("miso")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 50;
			LEVEL 0 FOR 10.0;
			LEVEL 1 FOR 10.0;
		}
	}
}

TRANSITION_LIST("mosi")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 176.258;
		LEVEL 1 FOR 10.39;
		LEVEL 0 FOR 159.61;
		LEVEL 1 FOR 20.39;
		LEVEL 0 FOR 149.61;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 10.39;
		LEVEL 0 FOR 149.61;
		LEVEL 1 FOR 30.39;
		LEVEL 0 FOR 139.61;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 103.742;
	}
}

TRANSITION_LIST("ssl")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 1000.0;
	}
}

TRANSITION_LIST("d_out[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 101.741;
		NODE
		{
			REPEAT = 44;
			LEVEL 1 FOR 10.0;
			LEVEL 0 FOR 10.0;
		}
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 8.259;
	}
}

TRANSITION_LIST("d_out[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 91.75;
		NODE
		{
			REPEAT = 45;
			LEVEL 1 FOR 10.0;
			LEVEL 0 FOR 10.0;
		}
		LEVEL 1 FOR 8.25;
	}
}

TRANSITION_LIST("d_out[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 81.44;
		NODE
		{
			REPEAT = 45;
			LEVEL 1 FOR 10.0;
			LEVEL 0 FOR 10.0;
		}
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 8.56;
	}
}

TRANSITION_LIST("d_out[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 71.303;
		NODE
		{
			REPEAT = 46;
			LEVEL 1 FOR 10.0;
			LEVEL 0 FOR 10.0;
		}
		LEVEL 1 FOR 8.697;
	}
}

TRANSITION_LIST("d_out[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 61.45;
		NODE
		{
			REPEAT = 46;
			LEVEL 1 FOR 10.0;
			LEVEL 0 FOR 10.0;
		}
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 8.55;
	}
}

TRANSITION_LIST("d_out[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 51.306;
		NODE
		{
			REPEAT = 47;
			LEVEL 1 FOR 10.0;
			LEVEL 0 FOR 10.0;
		}
		LEVEL 1 FOR 8.694;
	}
}

TRANSITION_LIST("d_out[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 41.452;
		NODE
		{
			REPEAT = 47;
			LEVEL 1 FOR 10.0;
			LEVEL 0 FOR 10.0;
		}
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 8.548;
	}
}

TRANSITION_LIST("d_out[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 31.746;
		NODE
		{
			REPEAT = 48;
			LEVEL 1 FOR 10.0;
			LEVEL 0 FOR 10.0;
		}
		LEVEL 1 FOR 8.254;
	}
}

TRANSITION_LIST("data_in[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_in[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_in[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_in[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_in[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 360.0;
	}
}

TRANSITION_LIST("data_in[2]")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 1;
			LEVEL 0 FOR 320.0;
			LEVEL 1 FOR 320.0;
		}
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 40.0;
	}
}

TRANSITION_LIST("data_in[1]")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 3;
			LEVEL 0 FOR 160.0;
			LEVEL 1 FOR 160.0;
		}
		LEVEL 0 FOR 40.0;
	}
}

TRANSITION_LIST("data_in[0]")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 6;
			LEVEL 0 FOR 80.0;
			LEVEL 1 FOR 80.0;
		}
		LEVEL 0 FOR 40.0;
	}
}

DISPLAY_LINE
{
	CHANNEL = "ssl";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 0;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "clk";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 1;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "data_in";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 2;
	TREE_LEVEL = 0;
	CHILDREN = 3, 4, 5, 6, 7, 8, 9, 10;
}

DISPLAY_LINE
{
	CHANNEL = "data_in[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 3;
	TREE_LEVEL = 1;
	PARENT = 2;
}

DISPLAY_LINE
{
	CHANNEL = "data_in[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 4;
	TREE_LEVEL = 1;
	PARENT = 2;
}

DISPLAY_LINE
{
	CHANNEL = "data_in[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 5;
	TREE_LEVEL = 1;
	PARENT = 2;
}

DISPLAY_LINE
{
	CHANNEL = "data_in[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 6;
	TREE_LEVEL = 1;
	PARENT = 2;
}

DISPLAY_LINE
{
	CHANNEL = "data_in[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 7;
	TREE_LEVEL = 1;
	PARENT = 2;
}

DISPLAY_LINE
{
	CHANNEL = "data_in[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 8;
	TREE_LEVEL = 1;
	PARENT = 2;
}

DISPLAY_LINE
{
	CHANNEL = "data_in[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 9;
	TREE_LEVEL = 1;
	PARENT = 2;
}

DISPLAY_LINE
{
	CHANNEL = "data_in[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 10;
	TREE_LEVEL = 1;
	PARENT = 2;
}

DISPLAY_LINE
{
	CHANNEL = "mosi";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 11;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "load";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 12;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "miso";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 13;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "d_out";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 14;
	TREE_LEVEL = 0;
	CHILDREN = 15, 16, 17, 18, 19, 20, 21, 22;
}

DISPLAY_LINE
{
	CHANNEL = "d_out[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 15;
	TREE_LEVEL = 1;
	PARENT = 14;
}

DISPLAY_LINE
{
	CHANNEL = "d_out[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 16;
	TREE_LEVEL = 1;
	PARENT = 14;
}

DISPLAY_LINE
{
	CHANNEL = "d_out[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 17;
	TREE_LEVEL = 1;
	PARENT = 14;
}

DISPLAY_LINE
{
	CHANNEL = "d_out[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 18;
	TREE_LEVEL = 1;
	PARENT = 14;
}

DISPLAY_LINE
{
	CHANNEL = "d_out[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 19;
	TREE_LEVEL = 1;
	PARENT = 14;
}

DISPLAY_LINE
{
	CHANNEL = "d_out[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 20;
	TREE_LEVEL = 1;
	PARENT = 14;
}

DISPLAY_LINE
{
	CHANNEL = "d_out[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 21;
	TREE_LEVEL = 1;
	PARENT = 14;
}

DISPLAY_LINE
{
	CHANNEL = "d_out[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 22;
	TREE_LEVEL = 1;
	PARENT = 14;
}

TIME_BAR
{
	TIME = 10425;
	MASTER = TRUE;
}
;

pro3.sim.vwf - 源码说明

本页面展示了「VHDL语言编写的 SPI总线控制器。。」中的 pro3.sim.vwf 源码文件，采用 VWF 编程语言编写，共 794 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

虫虫开发者社区收录了大量与SPI相关的技术资源，包括源代码、技术文档、电路图等，是电子工程师和嵌入式开发者的专业学习平台。

⌨️ 快捷键说明

复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?