tb_cfft.vhd

an implementation of fft 1024 with cos and sin generated by matlab.

LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
USE work.fft_pkg.all; 

ENTITY cfft_tester1 IS
generic ( N : integer :=64; --number of points   
         m : integer :=12; --input width
         add_g : integer :=1; --adder growth
         mult_g : integer :=9; --Growth of the multipliers; 
         twiddle_width : integer :=10 );--width of twiddle   roms factor);
END cfft_tester1 ;
ARCHITECTURE tester OF cfft_tester1 IS
   -- Component Declarations
component fft_filed_tb 
generic (  N : integer :=1024; --number of points   
         m : integer :=12; --input width
         add_g : integer :=1; --adder growth
         mult_g : integer :=9; --Growth of the multipliers; 
         twiddle_width : integer :=10 --width of twiddle   roms factor
  );    
port (  clock : in std_logic;   
  Xout_r : out std_logic_vector (m+((log2(N)-1)/2)*mult_g+log2(N )* add_g-1 downto 0);
    Xout_i : out std_logic_vector (m+((log2(N)-1)/2)*mult_g+log2(N)*add_g-1 downto 0)
 );     
end component;

	constant clkprd : time:=10 ns;
	
	signal 	clock : std_logic:='0';
   signal Xout_r : std_logic_vector (m+((log2(N)-1)/2)*mult_g+log2(N )* add_g-1 downto 0):=(others=>'0');
   signal Xout_i : std_logic_vector (m+((log2(N)-1)/2)*mult_g+log2(N)*add_g-1 downto 0):=(others=>'0'); 
	
	
BEGIN

      
testfft: fft_filed_tb
--generic map (  N : integer :=1024; --number of points   
--         m : integer :=12; --input width
--         add_g : integer :=1; --adder growth
--         mult_g : integer :=9; --Growth of the multipliers; 
--         twiddle_width : integer :=10 --width of twiddle   roms factor
--  );    
port map (  clock =>clock, 
  Xout_r =>Xout_r, 
    Xout_i =>Xout_i
 );
 
clockgen: process
begin
        clock <= '0';
        wait for clkprd/2;
        clock <= '1';
        wait for clkprd/2;
end process;
END tester;