fft.qip

基于altera 芯片得ofdm调制解调源程序

set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_math_pkg_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_lib_pkg_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_text_pkg_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_roundsat_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_avalon_streaming_source_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_avalon_streaming_sink_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_avalon_streaming_controller_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_fpcompiler_alufp_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_fpcompiler_aslf_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_fpcompiler_castftox_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_fpcompiler_castxtof_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_fpcompiler_clzf_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_fpcompiler_mulfp_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_addsub_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_bf_control_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_cma_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_core_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_counter_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_delay_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_bfi_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_bfii_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_cma_bfi_fp_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_enable_control_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_sink_control_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_source_control_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_stage_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_stg_pipe_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_stg_out_pipe_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_top_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_twrom_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_r22sdf_lib_pkg_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_bit_reverse_top_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_bit_reverse_reverse_carry_adder_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_bit_reverse_core_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join C:/altera/72/ip/fft/lib "auk_dspip_bit_reverse_addr_control_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "fft_bit_reverse_top.vhd"]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "fft.vhd"]
set_global_assignment -name SEARCH_PATH  C:/altera/72/ip/fft/lib