pio_tests.v

基于xilinx vierex5得pci express dma设计实现。

                          DATA_STORE[2] = data[23:16];
                          DATA_STORE[3] = data[31:24];
                          $display("[%t] : MEMWRITE64, Address = %x, Write Data %x",
                                     $realtime, BAR_INIT_P_BAR[ii][31:0], data);
                          TSK_TX_MEMORY_WRITE_64(DEFAULT_TAG, DEFAULT_TC, 10'd1, {BAR_INIT_P_BAR[ii+1][31:0],
			                         BAR_INIT_P_BAR[ii][31:0]}, 4'h0, 4'h8, 1'b0);

                          TSK_TX_CLK_EAT(10);
                          DEFAULT_TAG = DEFAULT_TAG + 1;


                          data = 32'hFF23FFFF;
                          DATA_STORE[0] = data[7:0];
                          DATA_STORE[1] = data[15:8];
                          DATA_STORE[2] = data[23:16];
                          DATA_STORE[3] = data[31:24]; 
                          $display("[%t] : MEMWRITE64, Address = %x, Write Data %x",
                                     $realtime, BAR_INIT_P_BAR[ii][31:0], data);
                          TSK_TX_MEMORY_WRITE_64(DEFAULT_TAG, DEFAULT_TC, 10'd1, {BAR_INIT_P_BAR[ii+1][31:0],
			                         BAR_INIT_P_BAR[ii][31:0]}, 4'h0, 4'h4, 1'b0);
                          TSK_TX_CLK_EAT(10);
                          DEFAULT_TAG = DEFAULT_TAG + 1;
                          
                          
                          data = 32'hFFFF45FF;
                          DATA_STORE[0] = data[7:0];
                          DATA_STORE[1] = data[15:8];
                          DATA_STORE[2] = data[23:16];
                          DATA_STORE[3] = data[31:24];
                          $display("[%t] : MEMWRITE64, Address = %x, Write Data %x",
                                     $realtime, BAR_INIT_P_BAR[ii][31:0], data);       
                          TSK_TX_MEMORY_WRITE_64(DEFAULT_TAG, DEFAULT_TC, 10'd1, {BAR_INIT_P_BAR[ii+1][31:0],
			                         BAR_INIT_P_BAR[ii][31:0]}, 4'h0, 4'h2, 1'b0);
                          TSK_TX_CLK_EAT(10);
                          DEFAULT_TAG = DEFAULT_TAG + 1; 

                          
                          data = 32'hFFFFFF67;
                          DATA_STORE[0] = data[7:0];
                          DATA_STORE[1] = data[15:8];
                          DATA_STORE[2] = data[23:16];
                          DATA_STORE[3] = data[31:24]; 
                          $display("[%t] : MEMWRITE64, Address = %x, Write Data %x",
                                     $realtime, BAR_INIT_P_BAR[ii][31:0], data);
                          TSK_TX_MEMORY_WRITE_64(DEFAULT_TAG, DEFAULT_TC, 10'd1, {BAR_INIT_P_BAR[ii+1][31:0],
			                         BAR_INIT_P_BAR[ii][31:0]}, 4'h0, 4'h1, 1'b0);
                          TSK_TX_CLK_EAT(10);
                          DEFAULT_TAG = DEFAULT_TAG + 1; 

                          P_READ_DATA = 32'hFFFF_FFFF;
                          TSK_TX_MEMORY_READ_64(DEFAULT_TAG, DEFAULT_TC, 10'd1, {BAR_INIT_P_BAR[ii+1][31:0],
			                        BAR_INIT_P_BAR[ii][31:0]}, 4'h0, 4'hF);
                          TSK_WAIT_FOR_READ_DATA;
                          $display("[%t] : MEMREAD64, Address = %x, Read Data %x", $realtime, BAR_INIT_P_BAR[ii][31:0], P_READ_DATA);
                          DEFAULT_TAG = DEFAULT_TAG + 1;                        

                          if  (P_READ_DATA != 32'h01234567)

                          begin
                            $display("[%t] : Test FAILED --- Error: Pattern Mismatch, Address = %x, Write Data 01234567 != Read Data %x",
                                    $realtime, BAR_INIT_P_BAR[ii][31:0]+2, P_READ_DATA);

                          end

                          $display("[%t] : TEST PASSED --- Mem 64 for pio_memTestByteEnables_test1", $realtime);
		          

        	        end
		default : $display("Error case in usrapp_tx\n");
	    endcase         

	 end

    
    $display("[%t] : Finished transmission of PCI-Express TLPs", $realtime);
    $finish;
end


else if(testname == "pio_memTestDataBus")
begin

    // This test will verify the data bus connections for the PIO designs block RAMS.
    // This memory test should be run prior to any other memory tests.
   
    TSK_SIMULATION_TIMEOUT(10050);

    TSK_SYSTEM_INITIALIZATION;

    TSK_BAR_INIT;


   verbose = 1;

	for (ii = 0; ii <= 6; ii = ii + 1) begin
	   
	    if (BAR_INIT_P_BAR_ENABLED[ii] > 2'b00) begin // bar is enabled
        

        
      $display("[%t] : Performing Memory data test to BAR %x of PIO design", $realtime, ii);

      TSK_MEM_TEST_DATA_BUS(ii);
        
      $display("[%t] : Test PASSED --- Finished Data Bus test to BAR %x", $realtime, ii);
	       $finish; // comment this line in order to run the Mem test to each of the 4 Block RAMS

	    end

	 end

    
    $finish;
end


else if(testname == "pio_memTestAddrBus")
begin

    // This test will verify the address bus connections for the PIO designs block RAMS.
    // This memory test should be run after the data bus test.

    TSK_SIMULATION_TIMEOUT(10050);

    TSK_SYSTEM_INITIALIZATION;
    
    TSK_BAR_INIT;


   PIO_MAX_MEMORY = 16; // Comment out this line in order to test the entire 8Kbyte memory space

                        // which will make this a long test to run.

	for (ii = 0; ii <= 6; ii = ii + 1) begin
	    if (BAR_INIT_P_BAR_ENABLED[ii] > 2'b00) begin // bar is enabled
     

     
          $display("[%t] : Performing Memory address test to BAR %x of PIO design", $realtime, ii);
     
          TSK_MEM_TEST_ADDR_BUS(ii, PIO_MAX_MEMORY);
     
          $display("[%t] : Address Test PASSED to BAR %x", $realtime, ii);
     

     
      end
	          
	 end

    $display("[%t] : Test PASSED --- Finished pio_memTestAddrBus", $realtime);
    $finish;
end



else if(testname == "pio_memTestDevice")
begin

    // This test will verify memory bit for the block RAMs of the PIO designs block RAMS.
    // This memory test should be run only after the address memory test.
   
    TSK_SIMULATION_TIMEOUT(80000);

    TSK_SYSTEM_INITIALIZATION;
    
    TSK_BAR_INIT;

    PIO_MAX_MEMORY = 8;  // Comment out this line in order to test the entire 8Kbyte memory space
                         // which will make this a VERY long test to run.

	for (ii = 0; ii <= 6; ii = ii + 1) begin

	    if (BAR_INIT_P_BAR_ENABLED[ii] > 2'b00) begin // bar is enabled
                      

                    $display("[%t] : Performing Memory device test to BAR %x of PIO design", $realtime, ii);
                    TSK_MEM_TEST_DEVICE(ii, PIO_MAX_MEMORY);
                    $display("[%t] : Device Test PASSED for BAR %x", $realtime,ii);
	                  				
	    end
  

	 end

    $display("[%t] : Test PASSED --- Finished pio_memTestDevice", $realtime);
    $finish;


end



else if(testname == "pio_readConfigReg_test0")
begin

    // This test will verify memory bit for the block RAMs of the PIO designs block RAMS.
    // This memory test should be run only after the address memory test.

    TSK_SIMULATION_TIMEOUT(80000);

    TSK_SYSTEM_INITIALIZATION;

    TSK_BAR_INIT;

    TSK_TX_READBACK_CONFIG; // read config registers via trn tx interface


end



else if(testname == "pio_tlp_test0")
begin
    TSK_SIMULATION_TIMEOUT(10050);

    TSK_SYSTEM_INITIALIZATION;
    
    TSK_BAR_INIT;

//--------------------------------------------------------------------------
//        Testing each BAR specific to its type (Mem32/IO/Mem64). Note
//         that the burst Mem32 and Completion TLPs will be received
//         by the PIO design passing through the core but will be discared. Only
//         1DW Mem32, IO, and mem64 TLPs will be successfully processed. This
//         test is for illustrative purposes and shows how the user can perform
//         various TLP transactions.
//--------------------------------------------------------------------------


	for (ii = 0; ii <= 6; ii = ii + 1) begin
	    if (BAR_INIT_P_BAR_ENABLED[ii] > 2'b00) // bar is enabled
               case(BAR_INIT_P_BAR_ENABLED[ii])
		   2'b01 : // IO SPACE
			begin
			   
			  $display("[%t] : Transmitting TLPs to IO 32 Space BAR %x", $realtime, ii);


                         //--------------------------------------------------------------------------
			  // Event : IO Write TLP
			  //--------------------------------------------------------------------------

			  TSK_TX_IO_WRITE(DEFAULT_TAG, BAR_INIT_P_BAR[ii][31:0], 4'hF, 32'hdead_beef);
			  TSK_TX_CLK_EAT(1000);
			  DEFAULT_TAG = DEFAULT_TAG + 1;

			  //--------------------------------------------------------------------------
			  // Event : IO Read TLP
			  //--------------------------------------------------------------------------

			  TSK_TX_IO_READ(DEFAULT_TAG, BAR_INIT_P_BAR[ii][31:0], 4'hF);
			  TSK_TX_CLK_EAT(100);
			  DEFAULT_TAG = DEFAULT_TAG + 1;

			 

		        end

		   2'b10 : // MEM 32 SPACE
			begin

			   
		          $display("[%t] : Transmitting TLPs to Memory 32 Space BAR %x", $realtime, ii);


			  //--------------------------------------------------------------------------
			  // Event : Memory Write 32 bit TLPs
			  //--------------------------------------------------------------------------


			  TSK_TX_MEMORY_WRITE_32(DEFAULT_TAG, DEFAULT_TC, 10'd1, BAR_INIT_P_BAR[ii][31:0], 4'h0, 4'hF, 1'b0);
			  TSK_TX_CLK_EAT(10);
			  DEFAULT_TAG = DEFAULT_TAG + 1;

			  TSK_TX_MEMORY_WRITE_32(DEFAULT_TAG, DEFAULT_TC, 10'd16, BAR_INIT_P_BAR[ii][31:0], 4'hF, 4'hF, 1'b0);
			  TSK_TX_CLK_EAT(10);
			  DEFAULT_TAG = DEFAULT_TAG + 1;

			  TSK_TX_MEMORY_WRITE_32(DEFAULT_TAG, DEFAULT_TC, 10'd32, BAR_INIT_P_BAR[ii][31:0], 4'hF, 4'hF, 1'b0);
			  TSK_TX_CLK_EAT(10);
			  DEFAULT_TAG = DEFAULT_TAG + 1;

			  TSK_TX_MEMORY_WRITE_32(DEFAULT_TAG, DEFAULT_TC, 10'd64, BAR_INIT_P_BAR[ii][31:0], 4'hF, 4'hF, 1'b0);
			  TSK_TX_CLK_EAT(10);
			  DEFAULT_TAG = DEFAULT_TAG + 1;

			  TSK_TX_MEMORY_WRITE_32(DEFAULT_TAG, DEFAULT_TC, 10'd128, BAR_INIT_P_BAR[ii][31:0], 4'hF, 4'hF, 1'b0);
			  TSK_TX_CLK_EAT(1000);
			  DEFAULT_TAG = DEFAULT_TAG + 1;
			  

			  //--------------------------------------------------------------------------
			  // Event : Memory Read 32 bit TLPs
			  //--------------------------------------------------------------------------


			  TSK_TX_MEMORY_READ_32(DEFAULT_TAG, DEFAULT_TC, 10'd1, BAR_INIT_P_BAR[ii][31:0], 4'h0, 4'hF);
        		  TSK_TX_CLK_EAT(10);
        		  DEFAULT_TAG = DEFAULT_TAG + 1;

			  TSK_TX_MEMORY_READ_32(DEFAULT_TAG, DEFAULT_TC, 10'd16, BAR_INIT_P_BAR[ii][31:0], 4'hF, 4'hF);
        		  TSK_TX_CLK_EAT(10);
        		  DEFAULT_TAG = DEFAULT_TAG + 1;

        		  TSK_TX_MEMORY_READ_32(DEFAULT_TAG, DEFAULT_TC, 10'd32, BAR_INIT_P_BAR[ii][31:0], 4'hF, 4'hF);
        		  TSK_TX_CLK_EAT(10);
        		  DEFAULT_TAG = DEFAULT_TAG + 1;

        		  TSK_TX_MEMORY_READ_32(DEFAULT_TAG, DEFAULT_TC, 10'd64, BAR_INIT_P_BAR[ii][31:0], 4'hF, 4'hF);
        		  TSK_TX_CLK_EAT(10);
        		  DEFAULT_TAG = DEFAULT_TAG + 1;

        		  TSK_TX_MEMORY_READ_32(DEFAULT_TAG, DEFAULT_TC, 10'd128, BAR_INIT_P_BAR[ii][31:0], 4'hF, 4'hF);
        		  TSK_TX_CLK_EAT(1000);
       			  DEFAULT_TAG = DEFAULT_TAG + 1;