mapped.mrp

基于xilinx vierex5得pci express dma设计实现。

"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/Msub_reg_pd_avail_
lut<9>" (ROM) removed.
    The signal "ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/N23" is
sourceless and has been removed.
     Sourceless block
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/Msub_reg_pd_avail_
xor<9>" (XOR) removed.
      The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/reg_pd_avail<9>"
is sourceless and has been removed.
       Sourceless block
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/trn_rfc_pd_av_9"
(SFF) removed.
 Sourceless block
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/reg_recvd_9" (SFF)
removed.
  The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/reg_recvd<9>" is
sourceless and has been removed.
The signal "ep/BU2/U0/pcie_ep0/mgmt_stats_credit<8>" is sourceless and has been
removed.
 Sourceless block
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/reg_pd_alloc_8"
(SFF) removed.
  The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/reg_pd_alloc<8>"
is sourceless and has been removed.
   Sourceless block
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/Msub_reg_pd_avail_
cy<8>" (MUX) removed.
    The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/Msub_reg_pd_avail_
cy<8>" is sourceless and has been removed.
   Sourceless block
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/Msub_reg_pd_avail_
lut<8>" (ROM) removed.
    The signal "ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/N22" is
sourceless and has been removed.
     Sourceless block
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/Msub_reg_pd_avail_
xor<8>" (XOR) removed.
      The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/reg_pd_avail<8>"
is sourceless and has been removed.
       Sourceless block
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/trn_rfc_pd_av_8"
(SFF) removed.
 Sourceless block
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/reg_recvd_8" (SFF)
removed.
  The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/ll_bridge/rx_bridge/rx_credit/reg_recvd<8>" is
sourceless and has been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_l0_mac_negotiated_link_width<3>" is sourceless
and has been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_l0_mac_negotiated_link_width<2>" is sourceless
and has been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_l0_mac_negotiated_link_width<1>" is sourceless
and has been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_l0_mac_negotiated_link_width<0>" is sourceless
and has been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_l0_dll_error_vector<6>" is sourceless and has
been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_l0_dll_error_vector<5>" is sourceless and has
been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_l0_dll_error_vector<4>" is sourceless and has
been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_max_payload_size<2>" is sourceless and has
been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_max_payload_size<1>" is sourceless and has
been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_max_payload_size<0>" is sourceless and has
been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_max_read_request_size<2>" is sourceless and
has been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_max_read_request_size<1>" is sourceless and
has been removed.
The signal "ep/BU2/U0/pcie_ep0/fe_max_read_request_size<0>" is sourceless and
has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/cfg_is_np_and_cpl_abort"
is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_detectedcorrectable_
not0001" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_detectednonfatal_or0
000" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<0
>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<1
>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<2
>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<3
>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<4
>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<5
>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<6
>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<7
>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<8
>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<9
>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<1
0>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<1
1>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<1
2>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<1
3>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<1
4>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<1
5>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<1
6>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<1
7>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<1
8>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<1
9>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<2
0>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<2
1>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<2
2>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<2
3>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<2
4>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<2
5>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<2
6>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<2
7>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<2
8>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<2
9>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<3
0>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<3
1>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<3
2>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<3
3>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<3
4>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<3
5>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<3
6>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<3
7>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<3
8>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<3
9>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<4
0>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<4
1>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<4
2>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<4
3>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<4
4>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<4
5>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<4
6>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<4
7>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/cfg_is_np_and_ur" is
sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wr_hdr_mux0000<4
9>" is sourceless and has been removed.
The signal "ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/cfg_posted"
is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wp_add0000<0>"
is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/error_manager/reg_cfg_wp_add0000<1>"
is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<1>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<3>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<6>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<7>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<8>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<10>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<12>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<13>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<14>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<15>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<20>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<22>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<23>" is sourceless and has been removed.
The signal
"ep/BU2/U0/pcie_ep0/pcie_blk_if/cf_bridge/management_interface/mgmt_wdata_mux000
0<25>" is sourceless and has been removed.