dispselector.tan.summary

来自「以CPLD器件EPM7128SLC84-15为核心实现的简易数字频率计」· SUMMARY 代码 · 共 67 行

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Timing Analyzer Summary
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Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 20.000 ns
From           : POS[2]
To             : DEBUG[0]
From Clock     : CLK
To Clock       : 
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 18.000 ns
From           : NUM5[2]
To             : DEBUG[0]
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Worst-case Minimum tco
Slack          : N/A
Required Time  : None
Actual Time    : 17.000 ns
From           : POS[2]
To             : CATSEL[4]
From Clock     : CLK
To Clock       : 
Failed Paths   : 0

Type           : Worst-case Minimum tpd
Slack          : N/A
Required Time  : None
Actual Time    : 15.000 ns
From           : NUM4[3]
To             : DEBUG[3]
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'CLK'
Slack          : N/A
Required Time  : None
Actual Time    : 76.92 MHz ( period = 13.000 ns )
From           : POS[2]
To             : POS[0]
From Clock     : CLK
To Clock       : CLK
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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