dispselector.fit.eqn

以CPLD器件EPM7128SLC84-15为核心实现的简易数字频率计

--POS[0] is POS[0] at LC7
POS[0]_p1_out = POS[1] & POS[2] & !POS[0];
POS[0]_or_out = POS[0]_p1_out;
POS[0]_reg_input = !POS[0]_or_out;
POS[0] = TFFE(POS[0]_reg_input, GLOBAL(CLK), , , );


--POS[2] is POS[2] at LC15
POS[2]_p1_out = !POS[1] & !POS[2];
POS[2]_p2_out = !POS[2] & !POS[0];
POS[2]_p3_out = !POS[1] & !POS[0];
POS[2]_or_out = POS[2]_p1_out # POS[2]_p2_out # POS[2]_p3_out;
POS[2]_reg_input = !POS[2]_or_out;
POS[2] = TFFE(POS[2]_reg_input, GLOBAL(CLK), , , );


--A1L62 is Mux~295 at LC25
A1L62_p1_out = POS[2] & !POS[0];
A1L62_or_out = A1L62_p1_out;
A1L62 = !(A1L62_or_out);


--A1L72 is Mux~298 at LC24
A1L72_p1_out = POS[2] & POS[0];
A1L72_or_out = A1L72_p1_out;
A1L72 = !(A1L72_or_out);


--POS[1] is POS[1] at LC16
POS[1]_p1_out = !POS[2] & POS[1] & !POS[0];
POS[1]_p2_out = !POS[2] & !POS[1] & POS[0];
POS[1]_or_out = POS[1]_p1_out # POS[1]_p2_out;
POS[1]_reg_input = POS[1]_or_out;
POS[1] = DFFE(POS[1]_reg_input, GLOBAL(CLK), , , );


--A1L82 is Mux~301 at LC21
A1L82_p1_out = POS[1] & !POS[0];
A1L82_or_out = A1L82_p1_out;
A1L82 = !(A1L82_or_out);


--A1L92 is Mux~304 at LC19
A1L92_p1_out = POS[1] & POS[0];
A1L92_or_out = A1L92_p1_out;
A1L92 = !(A1L92_or_out);


--A1L03 is Mux~307 at LC14
A1L03_p1_out = !POS[0] & !POS[1] & !POS[2];
A1L03_or_out = A1L03_p1_out;
A1L03 = !(A1L03_or_out);


--A1L13 is Mux~310 at LC17
A1L13_p1_out = POS[0] & !POS[1] & !POS[2];
A1L13_or_out = A1L13_p1_out;
A1L13 = !(A1L13_or_out);


--A1L42 is DGT[3]~3337 at LC13
A1L42_p0_out = POS[1] & !POS[2] & !POS[0] & NUM3[3];
A1L42_p1_out = NUM2[3] & !POS[1] & !POS[2] & POS[0];
A1L42_p2_out = !POS[1] & POS[2] & POS[0] & NUM6[3];
A1L42_p3_out = !POS[1] & POS[2] & !POS[0] & NUM5[3];
A1L42_p4_out = POS[1] & !POS[2] & POS[0] & NUM4[3];
A1L42_or_out = A1L52 # A1L42_p0_out # A1L42_p1_out # A1L42_p2_out # A1L42_p3_out # A1L42_p4_out;
A1L42 = A1L42_or_out;


--A1L41 is DGT[0]~3343 at LC11
A1L41_p0_out = !POS[2] & !POS[1] & POS[0] & NUM2[3] & NUM2[1];
A1L41_p1_out = NUM1[2] & NUM1[3] & !POS[2] & !POS[1] & !POS[0];
A1L41_p2_out = NUM1[3] & !POS[2] & !POS[1] & !POS[0] & NUM1[1];
A1L41_p3_out = !POS[2] & !POS[1] & POS[0] & NUM2[0];
A1L41_p4_out = !POS[2] & !POS[1] & POS[0] & NUM2[2] & NUM2[3];
A1L41_or_out = A1L71 # A1L41_p0_out # A1L41_p1_out # A1L41_p2_out # A1L41_p3_out # A1L41_p4_out;
A1L41 = A1L41_or_out;


--A1L12 is DGT[2]~3349 at LC6
A1L12_p0_out = !POS[2] & POS[1] & !POS[0] & NUM3[3] & NUM3[1];
A1L12_p1_out = NUM1[3] & NUM1[1] & !POS[2] & !POS[1] & !POS[0];
A1L12_p2_out = !POS[2] & POS[1] & POS[0] & NUM4[2];
A1L12_p3_out = !POS[2] & POS[1] & POS[0] & NUM4[3] & NUM4[1];
A1L12_p4_out = !POS[2] & POS[1] & !POS[0] & NUM3[2];
A1L12_or_out = A1L32 # A1L12_p0_out # A1L12_p1_out # A1L12_p2_out # A1L12_p3_out # A1L12_p4_out;
A1L12 = A1L12_or_out;


--A1L81 is DGT[1]~3355 at LC3
A1L81_p0_out = !POS[2] & POS[1] & !POS[0] & NUM3[3] & NUM3[2];
A1L81_p1_out = NUM1[3] & NUM1[2] & !POS[2] & !POS[1] & !POS[0];
A1L81_p2_out = !POS[2] & POS[1] & POS[0] & NUM4[1];
A1L81_p3_out = !POS[2] & POS[1] & POS[0] & NUM4[3] & NUM4[2];
A1L81_p4_out = !POS[2] & POS[1] & !POS[0] & NUM3[1];
A1L81_or_out = A1L02 # A1L81_p0_out # A1L81_p1_out # A1L81_p2_out # A1L81_p3_out # A1L81_p4_out;
A1L81 = A1L81_or_out;


--A1L52 is DGT[3]~3356 at LC12
A1L52_p1_out = NUM1[3] & !POS[1] & !POS[2] & !POS[0];
A1L52 = A1L52_p1_out;


--A1L51 is DGT[0]~3358 at LC8
A1L51_p1_out = NUM5[0] & POS[2] & !POS[1] & !POS[0];
A1L51_p2_out = POS[2] & !POS[1] & !POS[0] & NUM5[1] & NUM5[3];
A1L51_p3_out = POS[2] & !POS[1] & !POS[0] & NUM5[3] & NUM5[2];
A1L51 = A1L51_p1_out # A1L51_p2_out # A1L51_p3_out;


--A1L61 is DGT[0]~3362 at LC9
A1L61_p0_out = !POS[2] & POS[1] & !POS[0] & NUM3[2] & NUM3[3];
A1L61_p1_out = NUM6[0] & POS[2] & !POS[1] & POS[0];
A1L61_p2_out = POS[2] & !POS[1] & POS[0] & NUM6[1] & NUM6[3];
A1L61_p3_out = POS[2] & !POS[1] & POS[0] & NUM6[3] & NUM6[2];
A1L61_p4_out = !POS[2] & POS[1] & !POS[0] & NUM3[0];
A1L61 = A1L51 # A1L61_p0_out # A1L61_p1_out # A1L61_p2_out # A1L61_p3_out # A1L61_p4_out;


--A1L71 is DGT[0]~3368 at LC10
A1L71_p0_out = !POS[2] & !POS[1] & !POS[0] & NUM1[0];
A1L71_p1_out = NUM3[3] & NUM3[1] & !POS[2] & POS[1] & !POS[0];
A1L71_p2_out = !POS[2] & POS[1] & POS[0] & NUM4[0];
A1L71_p3_out = !POS[2] & POS[1] & POS[0] & NUM4[2] & NUM4[3];
A1L71_p4_out = !POS[2] & POS[1] & POS[0] & NUM4[3] & NUM4[1];
A1L71 = A1L61 # A1L71_p0_out # A1L71_p1_out # A1L71_p2_out # A1L71_p3_out # A1L71_p4_out;


--A1L22 is DGT[2]~3374 at LC4
A1L22_p1_out = NUM6[3] & NUM6[1] & POS[2] & !POS[1] & POS[0];
A1L22_p2_out = POS[2] & !POS[1] & POS[0] & NUM6[2];
A1L22 = A1L22_p1_out # A1L22_p2_out;


--A1L32 is DGT[2]~3377 at LC5
A1L32_p0_out = !POS[2] & !POS[1] & !POS[0] & NUM1[2];
A1L32_p1_out = NUM5[3] & NUM5[1] & POS[2] & !POS[1] & !POS[0];
A1L32_p2_out = POS[2] & !POS[1] & !POS[0] & NUM5[2];
A1L32_p3_out = !POS[2] & !POS[1] & POS[0] & NUM2[2];
A1L32_p4_out = !POS[2] & !POS[1] & POS[0] & NUM2[3] & NUM2[1];
A1L32 = A1L22 # A1L32_p0_out # A1L32_p1_out # A1L32_p2_out # A1L32_p3_out # A1L32_p4_out;


--A1L91 is DGT[1]~3383 at LC1
A1L91_p1_out = NUM6[1] & POS[2] & !POS[1] & POS[0];
A1L91_p2_out = POS[2] & !POS[1] & POS[0] & NUM6[3] & NUM6[2];
A1L91 = A1L91_p1_out # A1L91_p2_out;


--A1L02 is DGT[1]~3386 at LC2
A1L02_p0_out = !POS[2] & !POS[1] & !POS[0] & NUM1[1];
A1L02_p1_out = NUM5[1] & POS[2] & !POS[1] & !POS[0];
A1L02_p2_out = POS[2] & !POS[1] & !POS[0] & NUM5[3] & NUM5[2];
A1L02_p3_out = !POS[2] & !POS[1] & POS[0] & NUM2[1];
A1L02_p4_out = !POS[2] & !POS[1] & POS[0] & NUM2[3] & NUM2[2];
A1L02 = A1L91 # A1L02_p0_out # A1L02_p1_out # A1L02_p2_out # A1L02_p3_out # A1L02_p4_out;


--CLK is CLK at PIN_83
--operation mode is input

CLK = INPUT();


--NUM1[3] is NUM1[3] at PIN_81
--operation mode is input

NUM1[3] = INPUT();


--NUM1[2] is NUM1[2] at PIN_52
--operation mode is input

NUM1[2] = INPUT();


--NUM1[1] is NUM1[1] at PIN_33
--operation mode is input

NUM1[1] = INPUT();


--NUM1[0] is NUM1[0] at PIN_4
--operation mode is input

NUM1[0] = INPUT();


--NUM2[3] is NUM2[3] at PIN_61
--operation mode is input

NUM2[3] = INPUT();


--NUM2[2] is NUM2[2] at PIN_24
--operation mode is input

NUM2[2] = INPUT();


--NUM2[1] is NUM2[1] at PIN_80
--operation mode is input

NUM2[1] = INPUT();


--NUM2[0] is NUM2[0] at PIN_51
--operation mode is input

NUM2[0] = INPUT();


--NUM3[3] is NUM3[3] at PIN_60
--operation mode is input

NUM3[3] = INPUT();


--NUM3[2] is NUM3[2] at PIN_70
--operation mode is input

NUM3[2] = INPUT();


--NUM3[1] is NUM3[1] at PIN_34
--operation mode is input

NUM3[1] = INPUT();


--NUM3[0] is NUM3[0] at PIN_9
--operation mode is input

NUM3[0] = INPUT();


--NUM4[3] is NUM4[3] at PIN_37
--operation mode is input

NUM4[3] = INPUT();


--NUM4[2] is NUM4[2] at PIN_76
--operation mode is input

NUM4[2] = INPUT();


--NUM4[1] is NUM4[1] at PIN_57
--operation mode is input

NUM4[1] = INPUT();


--NUM4[0] is NUM4[0] at PIN_67
--operation mode is input

NUM4[0] = INPUT();


--NUM5[3] is NUM5[3] at PIN_48
--operation mode is input

NUM5[3] = INPUT();


--NUM5[2] is NUM5[2] at PIN_28
--operation mode is input

NUM5[2] = INPUT();


--NUM5[1] is NUM5[1] at PIN_49
--operation mode is input

NUM5[1] = INPUT();


--NUM5[0] is NUM5[0] at PIN_27
--operation mode is input

NUM5[0] = INPUT();


--NUM6[3] is NUM6[3] at PIN_58
--operation mode is input

NUM6[3] = INPUT();


--NUM6[2] is NUM6[2] at PIN_16
--operation mode is input

NUM6[2] = INPUT();


--NUM6[1] is NUM6[1] at PIN_79
--operation mode is input

NUM6[1] = INPUT();


--NUM6[0] is NUM6[0] at PIN_25
--operation mode is input

NUM6[0] = INPUT();


--CATSEL[4] is CATSEL[4] at PIN_17
--operation mode is output

CATSEL[4] = OUTPUT(A1L62);


--CATSEL[5] is CATSEL[5] at PIN_18
--operation mode is output

CATSEL[5] = OUTPUT(A1L72);


--CATSEL[2] is CATSEL[2] at PIN_20
--operation mode is output

CATSEL[2] = OUTPUT(A1L82);


--CATSEL[3] is CATSEL[3] at PIN_21
--operation mode is output

CATSEL[3] = OUTPUT(A1L92);


--DEBUG[3] is DEBUG[3] at PIN_6
--operation mode is output

DEBUG[3] = OUTPUT(A1L42);


--CATSEL[0] is CATSEL[0] at PIN_5
--operation mode is output

CATSEL[0] = OUTPUT(A1L03);


--CATSEL[1] is CATSEL[1] at PIN_22
--operation mode is output

CATSEL[1] = OUTPUT(A1L13);


--DEBUG[2] is DEBUG[2] at PIN_10
--operation mode is output

DEBUG[2] = OUTPUT(A1L12);


--DEBUG[1] is DEBUG[1] at PIN_12
--operation mode is output

DEBUG[1] = OUTPUT(A1L81);


--DEBUG[0] is DEBUG[0] at PIN_8
--operation mode is output

DEBUG[0] = OUTPUT(A1L41);