shifter.vhd

来自「last cordic for immplemantaion of cordic」· VHDL 代码 · 共 38 行

-- Description : right shifts a 64 bit value i places

library IEEE;
library work;
 use IEEE.STD_LOGIC_1164.ALL;
 use IEEE.STD_LOGIC_ARITH.ALL;
 use IEEE.STD_LOGIC_UNSIGNED.ALL;
 use work.all;
 entity shifter is port (
 x : in std_logic_vector(63 downto 0);
 i : in integer range 0 to 63; --number of bits to right shift
 shift : out std_logic_vector(63 downto 0));
 end shifter;

 architecture behavioral of shifter is


 begin

 process(x,i)
 begin
 if (i=0) then
 shift <= x ;
 elsif (i=1) then
 shift(63) <= '0' ;
 shift(62 downto 0) <= x(63 downto 1) ;
 else
 for j in 0 to 63 loop
 if (j+i < 64) then
 shift(j) <= x(j+i) ;
 else
 shift(j) <= '0' ;
 end if;
 end loop;
 end if;
 end process;

 end behavioral;