i2c_timesim.v

在一个32单元CPLD中实现的I2C SLave device

    .O(\inport_pre<9>_MC.D1_165 )
  );
  X_AND8 \inport_pre<9>_MC.D2_PT_0  (
    .I0(\inport<14>_II/UIM_7 ),
    .I1(\NlwInverterSignal_inport_pre<9>_MC.D2_PT_0/IN1 ),
    .I2(state[0]),
    .I3(state[2]),
    .I4(\NlwInverterSignal_inport_pre<9>_MC.D2_PT_0/IN4 ),
    .I5(state[3]),
    .I6(state[4]),
    .I7(\NlwInverterSignal_inport_pre<9>_MC.D2_PT_0/IN7 ),
    .O(\inport_pre<9>_MC.D2_PT_0_167 )
  );
  X_AND8 \inport_pre<9>_MC.D2_PT_1  (
    .I0(\inport<15>_II/UIM_8 ),
    .I1(\NlwInverterSignal_inport_pre<9>_MC.D2_PT_1/IN1 ),
    .I2(state[0]),
    .I3(state[2]),
    .I4(\NlwInverterSignal_inport_pre<9>_MC.D2_PT_1/IN4 ),
    .I5(state[3]),
    .I6(state[4]),
    .I7(\NlwInverterSignal_inport_pre<9>_MC.D2_PT_1/IN7 ),
    .O(\inport_pre<9>_MC.D2_PT_1_168 )
  );
  X_AND16 \inport_pre<9>_MC.D2_PT_2  (
    .I0(\NlwInverterSignal_inport_pre<9>_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_inport_pre<9>_MC.D2_PT_2/IN1 ),
    .I2(inport_pre[9]),
    .I3(state[0]),
    .I4(state[2]),
    .I5(\NlwInverterSignal_inport_pre<9>_MC.D2_PT_2/IN5 ),
    .I6(state[3]),
    .I7(state[4]),
    .I8(\NlwInverterSignal_inport_pre<9>_MC.D2_PT_2/IN8 ),
    .I9(Vcc_92),
    .I10(Vcc_92),
    .I11(Vcc_92),
    .I12(Vcc_92),
    .I13(Vcc_92),
    .I14(Vcc_92),
    .I15(Vcc_92),
    .O(\inport_pre<9>_MC.D2_PT_2_169 )
  );
  X_OR3 \inport_pre<9>_MC.D2  (
    .I0(\inport_pre<9>_MC.D2_PT_0_167 ),
    .I1(\inport_pre<9>_MC.D2_PT_1_168 ),
    .I2(\inport_pre<9>_MC.D2_PT_2_169 ),
    .O(\inport_pre<9>_MC.D2_166 )
  );
  X_BUF N_PZ_186 (
    .I(\N_PZ_186_MC.Q_170 ),
    .O(N_PZ_186_66)
  );
  X_BUF \N_PZ_186_MC.Q  (
    .I(\N_PZ_186_MC.D_171 ),
    .O(\N_PZ_186_MC.Q_170 )
  );
  X_XOR2 \N_PZ_186_MC.D  (
    .I0(\N_PZ_186_MC.D1_172 ),
    .I1(\N_PZ_186_MC.D2_173 ),
    .O(\N_PZ_186_MC.D_171 )
  );
  X_AND2 \N_PZ_186_MC.D1  (
    .I0(\NlwInverterSignal_N_PZ_186_MC.D1/IN0 ),
    .I1(\NlwInverterSignal_N_PZ_186_MC.D1/IN1 ),
    .O(\N_PZ_186_MC.D1_172 )
  );
  X_AND6 \N_PZ_186_MC.D2  (
    .I0(\NlwInverterSignal_N_PZ_186_MC.D2/IN0 ),
    .I1(\NlwInverterSignal_N_PZ_186_MC.D2/IN1 ),
    .I2(\NlwInverterSignal_N_PZ_186_MC.D2/IN2 ),
    .I3(\NlwInverterSignal_N_PZ_186_MC.D2/IN3 ),
    .I4(\NlwInverterSignal_N_PZ_186_MC.D2/IN4 ),
    .I5(\NlwInverterSignal_N_PZ_186_MC.D2/IN5 ),
    .O(\N_PZ_186_MC.D2_173 )
  );
  X_BUF \inport_pre<2>  (
    .I(\inport_pre<2>_MC.Q ),
    .O(inport_pre[2])
  );
  X_XOR2 \inport_pre<2>_MC_tsimcreated_xor_  (
    .I0(\inport_pre<2>_MC.D_174 ),
    .I1(\inport_pre<2>_MC.Q ),
    .O(\inport_pre<2>_MC_tsimcreated_xor__175 )
  );
  X_OR2 \inport_pre<2>_MC_tsimcreated_prld_  (
    .I0(\clr_n_II/FSR-_4 ),
    .I1(Gnd_15),
    .O(\inport_pre<2>_MC_tsimcreated_prld__176 )
  );
  defparam \inport_pre<2>_MC.REG .INIT = 1'b0;
  X_FF \inport_pre<2>_MC.REG  (
    .I(\inport_pre<2>_MC_tsimcreated_xor__175 ),
    .CE(Vcc_92),
    .CLK(\scl_II/FCLK_17 ),
    .SET(Gnd_15),
    .RST(\inport_pre<2>_MC_tsimcreated_prld__176 ),
    .O(\inport_pre<2>_MC.Q )
  );
  X_XOR2 \inport_pre<2>_MC.D  (
    .I0(\inport_pre<2>_MC.D1_177 ),
    .I1(\inport_pre<2>_MC.D2_178 ),
    .O(\inport_pre<2>_MC.D_174 )
  );
  X_AND7 \inport_pre<2>_MC.D1  (
    .I0(N_PZ_186_66),
    .I1(state[0]),
    .I2(state[2]),
    .I3(\NlwInverterSignal_inport_pre<2>_MC.D1/IN3 ),
    .I4(state[3]),
    .I5(state[4]),
    .I6(\NlwInverterSignal_inport_pre<2>_MC.D1/IN6 ),
    .O(\inport_pre<2>_MC.D1_177 )
  );
  X_ZERO \inport_pre<2>_MC.D2  (
    .O(\inport_pre<2>_MC.D2_178 )
  );
  X_BUF \portsel<0>_MC.Q  (
    .I(\portsel<0>_MC.Q_tsimrenamed_net_ ),
    .O(\portsel<0>_MC.Q_52 )
  );
  X_OR2 \portsel<0>_MC_tsimcreated_prld_  (
    .I0(\clr_n_II/FSR-_4 ),
    .I1(Gnd_15),
    .O(\portsel<0>_MC_tsimcreated_prld__179 )
  );
  defparam \portsel<0>_MC.REG .INIT = 1'b0;
  X_FF \portsel<0>_MC.REG  (
    .I(\portsel<0>_MC.D_180 ),
    .CE(\portsel<0>_MC.CE_181 ),
    .CLK(\scl_II/FCLK_17 ),
    .SET(Gnd_15),
    .RST(\portsel<0>_MC_tsimcreated_prld__179 ),
    .O(\portsel<0>_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \portsel<0>_MC.D  (
    .I0(\portsel<0>_MC.D1_182 ),
    .I1(\portsel<0>_MC.D2_183 ),
    .O(\portsel<0>_MC.D_180 )
  );
  X_ZERO \portsel<0>_MC.D1  (
    .O(\portsel<0>_MC.D1_182 )
  );
  X_AND2 \portsel<0>_MC.D2  (
    .I0(\sda_II/UIM_19 ),
    .I1(\sda_II/UIM_19 ),
    .O(\portsel<0>_MC.D2_183 )
  );
  X_AND6 \portsel<0>_MC.CE  (
    .I0(state[0]),
    .I1(\NlwInverterSignal_portsel<0>_MC.CE/IN1 ),
    .I2(\NlwInverterSignal_portsel<0>_MC.CE/IN2 ),
    .I3(\NlwInverterSignal_portsel<0>_MC.CE/IN3 ),
    .I4(state[4]),
    .I5(\NlwInverterSignal_portsel<0>_MC.CE/IN5 ),
    .O(\portsel<0>_MC.CE_181 )
  );
  X_BUF \portsel<1>_MC.Q  (
    .I(\portsel<1>_MC.Q_tsimrenamed_net_ ),
    .O(\portsel<1>_MC.Q_53 )
  );
  X_OR2 \portsel<1>_MC_tsimcreated_prld_  (
    .I0(\clr_n_II/FSR-_4 ),
    .I1(Gnd_15),
    .O(\portsel<1>_MC_tsimcreated_prld__184 )
  );
  defparam \portsel<1>_MC.REG .INIT = 1'b0;
  X_FF \portsel<1>_MC.REG  (
    .I(\portsel<1>_MC.D_185 ),
    .CE(\portsel<1>_MC.CE_186 ),
    .CLK(\scl_II/FCLK_17 ),
    .SET(Gnd_15),
    .RST(\portsel<1>_MC_tsimcreated_prld__184 ),
    .O(\portsel<1>_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \portsel<1>_MC.D  (
    .I0(\portsel<1>_MC.D1_187 ),
    .I1(\portsel<1>_MC.D2_188 ),
    .O(\portsel<1>_MC.D_185 )
  );
  X_ZERO \portsel<1>_MC.D1  (
    .O(\portsel<1>_MC.D1_187 )
  );
  X_AND2 \portsel<1>_MC.D2  (
    .I0(\sda_II/UIM_19 ),
    .I1(\sda_II/UIM_19 ),
    .O(\portsel<1>_MC.D2_188 )
  );
  X_AND6 \portsel<1>_MC.CE  (
    .I0(\NlwInverterSignal_portsel<1>_MC.CE/IN0 ),
    .I1(\NlwInverterSignal_portsel<1>_MC.CE/IN1 ),
    .I2(\NlwInverterSignal_portsel<1>_MC.CE/IN2 ),
    .I3(\NlwInverterSignal_portsel<1>_MC.CE/IN3 ),
    .I4(state[4]),
    .I5(\NlwInverterSignal_portsel<1>_MC.CE/IN5 ),
    .O(\portsel<1>_MC.CE_186 )
  );
  X_BUF \portsel<2>_MC.Q  (
    .I(\portsel<2>_MC.Q_tsimrenamed_net_ ),
    .O(\portsel<2>_MC.Q_54 )
  );
  X_OR2 \portsel<2>_MC_tsimcreated_prld_  (
    .I0(\clr_n_II/FSR-_4 ),
    .I1(Gnd_15),
    .O(\portsel<2>_MC_tsimcreated_prld__189 )
  );
  defparam \portsel<2>_MC.REG .INIT = 1'b0;
  X_FF \portsel<2>_MC.REG  (
    .I(\portsel<2>_MC.D_190 ),
    .CE(\portsel<2>_MC.CE_191 ),
    .CLK(\scl_II/FCLK_17 ),
    .SET(Gnd_15),
    .RST(\portsel<2>_MC_tsimcreated_prld__189 ),
    .O(\portsel<2>_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \portsel<2>_MC.D  (
    .I0(\portsel<2>_MC.D1_192 ),
    .I1(\portsel<2>_MC.D2_193 ),
    .O(\portsel<2>_MC.D_190 )
  );
  X_ZERO \portsel<2>_MC.D1  (
    .O(\portsel<2>_MC.D1_192 )
  );
  X_AND2 \portsel<2>_MC.D2  (
    .I0(\sda_II/UIM_19 ),
    .I1(\sda_II/UIM_19 ),
    .O(\portsel<2>_MC.D2_193 )
  );
  X_AND6 \portsel<2>_MC.CE  (
    .I0(state[0]),
    .I1(state[2]),
    .I2(state[1]),
    .I3(state[3]),
    .I4(\NlwInverterSignal_portsel<2>_MC.CE/IN4 ),
    .I5(\NlwInverterSignal_portsel<2>_MC.CE/IN5 ),
    .O(\portsel<2>_MC.CE_191 )
  );
  X_BUF \portsel<3>_MC.Q  (
    .I(\portsel<3>_MC.Q_tsimrenamed_net_ ),
    .O(\portsel<3>_MC.Q_55 )
  );
  X_OR2 \portsel<3>_MC_tsimcreated_prld_  (
    .I0(\clr_n_II/FSR-_4 ),
    .I1(Gnd_15),
    .O(\portsel<3>_MC_tsimcreated_prld__194 )
  );
  defparam \portsel<3>_MC.REG .INIT = 1'b0;
  X_FF \portsel<3>_MC.REG  (
    .I(\portsel<3>_MC.D_195 ),
    .CE(\portsel<3>_MC.CE_196 ),
    .CLK(\scl_II/FCLK_17 ),
    .SET(Gnd_15),
    .RST(\portsel<3>_MC_tsimcreated_prld__194 ),
    .O(\portsel<3>_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \portsel<3>_MC.D  (
    .I0(\portsel<3>_MC.D1_197 ),
    .I1(\portsel<3>_MC.D2_198 ),
    .O(\portsel<3>_MC.D_195 )
  );
  X_ZERO \portsel<3>_MC.D1  (
    .O(\portsel<3>_MC.D1_197 )
  );
  X_AND2 \portsel<3>_MC.D2  (
    .I0(\sda_II/UIM_19 ),
    .I1(\sda_II/UIM_19 ),
    .O(\portsel<3>_MC.D2_198 )
  );
  X_AND6 \portsel<3>_MC.CE  (
    .I0(\NlwInverterSignal_portsel<3>_MC.CE/IN0 ),
    .I1(state[2]),
    .I2(state[1]),
    .I3(state[3]),
    .I4(\NlwInverterSignal_portsel<3>_MC.CE/IN4 ),
    .I5(\NlwInverterSignal_portsel<3>_MC.CE/IN5 ),
    .O(\portsel<3>_MC.CE_196 )
  );
  X_BUF \portsel<4>_MC.Q  (
    .I(\portsel<4>_MC.Q_tsimrenamed_net_ ),
    .O(\portsel<4>_MC.Q_56 )
  );
  X_OR2 \portsel<4>_MC_tsimcreated_prld_  (
    .I0(\clr_n_II/FSR-_4 ),
    .I1(Gnd_15),
    .O(\portsel<4>_MC_tsimcreated_prld__199 )
  );
  defparam \portsel<4>_MC.REG .INIT = 1'b0;
  X_FF \portsel<4>_MC.REG  (
    .I(\portsel<4>_MC.D_200 ),
    .CE(\portsel<4>_MC.CE_201 ),
    .CLK(\scl_II/FCLK_17 ),
    .SET(Gnd_15),
    .RST(\portsel<4>_MC_tsimcreated_prld__199 ),
    .O(\portsel<4>_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \portsel<4>_MC.D  (
    .I0(\portsel<4>_MC.D1_202 ),
    .I1(\portsel<4>_MC.D2_203 ),
    .O(\portsel<4>_MC.D_200 )
  );
  X_ZERO \portsel<4>_MC.D1  (
    .O(\portsel<4>_MC.D1_202 )
  );
  X_AND2 \portsel<4>_MC.D2  (
    .I0(\sda_II/UIM_19 ),
    .I1(\sda_II/UIM_19 ),
    .O(\portsel<4>_MC.D2_203 )
  );
  X_AND6 \portsel<4>_MC.CE  (
    .I0(state[0]),
    .I1(state[2]),
    .I2(\NlwInverterSignal_portsel<4>_MC.CE/IN2 ),
    .I3(state[3]),
    .I4(\NlwInverterSignal_portsel<4>_MC.CE/IN4 ),
    .I5(\NlwInverterSignal_portsel<4>_MC.CE/IN5 ),
    .O(\portsel<4>_MC.CE_201 )
  );
  X_BUF \portsel<5>_MC.Q  (
    .I(\portsel<5>_MC.Q_tsimrenamed_net_ ),
    .O(\portsel<5>_MC.Q_57 )
  );
  X_OR2 \portsel<5>_MC_tsimcreated_prld_  (
    .I0(\clr_n_II/FSR-_4 ),
    .I1(Gnd_15),
    .O(\portsel<5>_MC_tsimcreated_prld__204 )
  );
  defparam \portsel<5>_MC.REG .INIT = 1'b0;
  X_FF \portsel<5>_MC.REG  (
    .I(\portsel<5>_MC.D_205 ),
    .CE(\portsel<5>_MC.CE_206 ),
    .CLK(\scl_II/FCLK_17 ),
    .SET(Gnd_15),
    .RST(\portsel<5>_MC_tsimcreated_prld__204 ),
    .O(\portsel<5>_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \portsel<5>_MC.D  (
    .I0(\portsel<5>_MC.D1_207 ),
    .I1(\portsel<5>_MC.D2_208 ),
    .O(\portsel<5>_MC.D_205 )
  );
  X_ZERO \portsel<5>_MC.D1  (
    .O(\portsel<5>_MC.D1_207 )
  );
  X_AND2 \portsel<5>_MC.D2  (
    .I0(\sda_II/UIM_19 ),
    .I1(\sda_II/UIM_19 ),
    .O(\portsel<5>_MC.D2_208 )
  );
  X_AND6 \portsel<5>_MC.CE  (
    .I0(\NlwInverterSignal_portsel<5>_MC.CE/IN0 ),
    .I1(state[2]),
    .I2(\NlwInverterSignal_portsel<5>_MC.CE/IN2 ),
    .I3(state[3]),
    .I4(\NlwInverterSignal_portsel<5>_MC.CE/IN4 ),
    .I5(\NlwInverterSignal_portsel<5>_MC.CE/IN5 ),
    .O(\portsel<5>_MC.CE_206 )
  );
  X_BUF \portsel<6>_MC.Q  (
    .I(\portsel<6>_MC.Q_tsimrenamed_net_ ),
    .O(\portsel<6>_MC.Q_58 )
  );
  X_OR2 \portsel<6>_MC_tsimcreated_prld_  (
    .I0(\clr_n_II/FSR-_4 ),
    .I1(Gnd_15),
    .O(\portsel<6>_MC_tsimcreated_prld__209 )
  );
  defparam \portsel<6>_MC.REG .INIT = 1'b0;
  X_FF \portsel<6>_MC.REG  (
    .I(\portsel<6>_MC.D_210 ),
    .CE(\portsel<6>_MC.CE_211 ),
    .CLK(\scl_II/FCLK_17 ),
    .SET(Gnd_15),
    .RST(\portsel<6>_MC_tsimcreated_prld__209 ),
    .O(\portsel<6>_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \portsel<6>_MC.D  (
    .I0(\portsel<6>_MC.D1_212 ),
    .I1(\portsel<6>_MC.D2_213 ),
    .O(\portsel<6>_MC.D_210 )
  );
  X_ZERO \portsel<6>_MC.D1  (
    .O(\portsel<6>_MC.D1_212 )
  );
  X_AND2 \portsel<6>_MC.D2  (
    .I0(\sda_II/UIM_19 ),
    .I1(\sda_II/UIM_19 ),
    .O(\portsel<6>_MC.D2_213 )
  );
  X_AND6 \portsel<6>_MC.CE  (
    .I0(state[0]),
    .I1(\NlwInverterSignal_portsel<6>_MC.CE/IN1 ),
    .I2(state[1]),
    .I3(state[3]),
    .I4(\NlwInverterSignal_portsel<6>_MC.CE/IN4 ),
    .I5(\NlwInverterSignal_portsel<6>_MC.CE/IN5 ),
    .O(\portsel<6>_MC.CE_211 )
  );
  X_BUF \portsel<7>_MC.Q  (
    .I(\portsel<7>_MC.Q_tsimrenamed_net_ ),
    .O(\portsel<7>_MC.Q_59 )
  );
  X_OR2 \portsel<7>_MC_tsimcreated_prld_  (
    .I0(\clr_n_II/FSR-_4 ),
    .I1(Gnd_15),
    .O(\portsel<7>_MC_tsimcreated_prld__214 )
  );
  defparam \portsel<7>_MC.REG .INIT = 1'b0;
  X_FF \portsel<7>_MC.REG  (
    .I(\portsel<7>_MC.D_215 ),
    .CE(\portsel<7>_MC.CE_216 ),
    .CLK(\scl_II/FCLK_17 ),
    .SET(Gnd_15),
    .RST(\portsel<7>_MC_tsimcreated_prld__214 ),
    .O(\portsel<7>_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \portsel<7>_MC.D  (
    .I0(\portsel<7>_MC.D1_217 ),
    .I1(\portsel<7>_MC.D2_218 ),
    .O(\portsel<7>_MC.D_215 )
  );
  X_ZERO \portsel<7>_MC.D1  (
    .O(\portsel<7>_MC.D1_217 )
  );
  X_AND2 \portsel<