_primary.vhd

来自「在一个32单元CPLD中实现的I2C SLave device」· VHDL 代码 · 共 15 行

library verilog;
use verilog.vl_types.all;
entity i2c is
    port(
        clr_n           : in     vl_logic;
        scl             : in     vl_logic;
        scl_int         : in     vl_logic;
        outport         : out    vl_logic;
        scl_n           : out    vl_logic;
        sda             : inout  vl_logic;
        inport          : in     vl_logic_vector(15 downto 0);
        portsel         : out    vl_logic_vector(7 downto 0)
    );
end i2c;