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📄 generic_ucf.txt

📁 XILINX memory interface generator. XILINX的外部存储器接口。
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INST1_var "infrastructure_top0/wait_200us" TNM = "wait200us";
INST1_var  "infrastructure_top0/wait_clk90" TNM = "wait200us90";
INST1_var  "infrastructure_top0/sys_rst*" TNM = "sysrst";


TIMESPEC TS01 =  FROM  "wait200us"  TO  "sysrst"   TIG;

TIMESPEC TS02 =  FROM  "wait200us90"  TO  "sysrst"   TIG;

TIMESPEC TS05 =  FROM  "wait200us"  TO  "wait200us90"   TIG;


#NET "*/ddr1_top0/reset90_r" TIG;
NET "*/controller0/rst_calib*" TIG;
#INST "*/ddr1_top0/infrastructure0/delay_sel_val*" TIG;
#INST "*/ddr1_top0/infrastructure0/rst_calib*" TIG;
#INST "*/cal_top0/cal_ctl0/un1_tapForDqs*" TIG;
NET "reset_in" TIG;
NET "sys_rst*" TIG;
NET "*/controller0/rst0*" TIG;
NET "*/controller0/rst180*" TIG;
INST "*/data_path0/data_read_controller0/dqs_delay*_col*" TIG;
#INST "*/ddr1_top0/data_path0/data_read_controller0/rst_dqs_div_delayed*" TIG;


#######################################################################################################################
# Calibration Circuit Constraints #
#######################################################################################################################
# Placement constraints for luts in tap delay ckt #
#######################################################################################################################

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l0"  RLOC=X0Y6;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l0"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";
 
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l1" RLOC=X0Y6;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l1"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";
 
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l2" RLOC=X0Y7;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l2"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l3" RLOC=X0Y7;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l3"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l4" RLOC=X1Y6;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l4"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l5" RLOC=X1Y6;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l5"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l6" RLOC=X1Y7;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l6"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l7" RLOC=X1Y7;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l7"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";
  
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l8" RLOC=X0Y4;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l8"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";
 
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l9" RLOC=X0Y4;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l9"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";
 
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l10" RLOC=X0Y5;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l10"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";
 
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l11" RLOC=X0Y5;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l11"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";
 
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l12" RLOC=X1Y4;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l12"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";
 
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l13" RLOC=X1Y4;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l13"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";
 
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l14" RLOC=X1Y5;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l14"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l15" RLOC=X1Y5;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l15"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l16" RLOC=X0Y2;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l16"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l17" RLOC=X0Y2;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l17"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l18" RLOC=X0Y3;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l18"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l19" RLOC=X0Y3;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l19"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l20" RLOC=X1Y2;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l20"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l21" RLOC=X1Y2;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l21"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l22" RLOC=X1Y3;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l22"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l23" RLOC=X1Y3;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l23"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l24" RLOC=X0Y0;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l24"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l25" RLOC=X0Y0;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l25"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l26" RLOC=X0Y1;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l26"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l27" RLOC=X0Y1;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l27"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l28" RLOC=X1Y0;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l28"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l29" RLOC=X1Y0;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l29"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l30" RLOC=X1Y1;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l30"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l31" RLOC=X1Y1;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/l31"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

#######################################################################################################################
# Placement constraints for first stage flops in tap delay ckt #
#######################################################################################################################
 
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r0"    RLOC=X0Y6;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r0"   U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r1" RLOC=X0Y6;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/r1"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r2" RLOC=X0Y7;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r2"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r3" RLOC=X0Y7;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r3"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r4" RLOC=X1Y6;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r4"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r5" RLOC=X1Y6;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r5"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r6" RLOC=X1Y7;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r6"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r7" RLOC=X1Y7;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r7"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r8" RLOC=X0Y4;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r8"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r9" RLOC=X0Y4;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r9"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r10" RLOC=X0Y5;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r10"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r11" RLOC=X0Y5;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r11"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r12" RLOC=X1Y4;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r12"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r13" RLOC=X1Y4;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r13"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r14" RLOC=X1Y5;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r14"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST "%sinfrastructure_top0/cal_top0/tap_dly0/r15" RLOC=X1Y5;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r15"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r16" RLOC=X0Y2;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r16"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r17" RLOC=X0Y2;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r17"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r18" RLOC=X0Y3;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r18"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r19" RLOC=X0Y3;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r19"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r20" RLOC=X1Y2;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r20"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r21" RLOC=X1Y2;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r21"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r22" RLOC=X1Y3;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r22"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r23" RLOC=X1Y3;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r23"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r24" RLOC=X0Y0;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r24"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r25" RLOC=X0Y0;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r25"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r26" RLOC=X0Y1;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r26"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r27" RLOC=X0Y1;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r27"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r28" RLOC=X1Y0;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r28"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r29" RLOC=X1Y0;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r29"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r30" RLOC=X1Y1;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r30"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r31" RLOC=X1Y1;
INST  "%sinfrastructure_top0/cal_top0/tap_dly0/r31"  U_SET = "%sinfrastructure_top0/cal_top0/tap_dly0/l0";

#######################################################################################################################
# BEL constraints for luts in tap delay ckt #
#######################################################################################################################

INST "%sinfrastructure_top0/cal_top0/tap_dly0/l0" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l1" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l2" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l3" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l4" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l5" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l6" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l7" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l8" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l9" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l10" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l11" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l12" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l13" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l14" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l15" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l16" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l17" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l18" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l19" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l20" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l21" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l22" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l23" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l24" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l25" BEL= F;  
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l26" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l27" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l28" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l29" BEL= F;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l30" BEL= G;
INST "%sinfrastructure_top0/cal_top0/tap_dly0/l31" BEL= F;

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