qdr2_test.sdc

来自「XILINX memory interface generator. XILI」· SDC 代码 · 共 79 行

# Synplicity, Inc. constraint file
# D:\shyam\qdr2\qdr2_design\36_bit\synth\qdr2_burst_4_body.sdc
# Written on Wed Sep 08 15:49:46 2004
# by Synplify Pro, 7.3.4      Scope Editor

#
# Clocks
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# Clock to Clock
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# Inputs/Outputs
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#
# Registers
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#
# Multicycle Path
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# False Path
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# Delay Path
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#
# Attributes
#
define_global_attribute          syn_global_buffers {3}
define_attribute          {QDR_Interface_B.Read_data_path.cq_delayed_col0[0]} syn_noclockbuf {1}
define_attribute          {QDR_Interface_B.Read_data_path.cq_delayed_col1[0]} syn_noclockbuf {1}
define_attribute          {QDR_Interface_B.Read_data_path.cq_delayed_col0[1]} syn_noclockbuf {1}
define_attribute          {QDR_Interface_B.Read_data_path.cq_delayed_col1[1]} syn_noclockbuf {1}
define_attribute          {QDR_Interface_B.Read_data_path.cq_delayed_col0[2]} syn_noclockbuf {1}
define_attribute          {QDR_Interface_B.Read_data_path.cq_delayed_col1[2]} syn_noclockbuf {1}
define_attribute          {QDR_Interface_B.Read_data_path.cq_delayed_col0[3]} syn_noclockbuf {1}
define_attribute          {QDR_Interface_B.Read_data_path.cq_delayed_col1[3]} syn_noclockbuf {1}

define_attribute          {v:work.cal_ctl} syn_hier {hard}
define_attribute          {v:work.cal_div2} syn_hier {hard}
define_attribute          {v:work.cal_reg} syn_hier {hard}
define_attribute          {v:work.cal_top} syn_hier {hard}
define_attribute          {v:work.concat2to36Data} syn_hier {hard}
define_attribute          {v:work.counter_262144} syn_hier {hard}
define_attribute          {v:work.counter_4} syn_hier {hard}
define_attribute          {v:work.cq_delay} syn_hier {hard}
define_attribute          {v:work.data_path} syn_hier {hard}
define_attribute          {v:work.delay} syn_hier {hard}
define_attribute          {v:work.qdr2_burst_4_body} syn_hier {hard}
define_attribute          {v:work.qdr2_clocks} syn_hier {hard}
define_attribute          {v:work.qdr2_cq_bar_div} syn_hier {hard}
define_attribute          {v:work.qdr2_cq_div} syn_hier {hard}
define_attribute          {v:work.qdr2_fsm_access} syn_hier {hard}
define_attribute          {v:work.qdr2_qbit_cq} syn_hier {hard}
define_attribute          {v:work.qdr2_qbit_cq_bar} syn_hier {hard}
define_attribute          {v:work.QDR2_RESET} syn_hier {hard}
define_attribute          {v:work.qdr2_transfer_done} syn_hier {hard}
define_attribute          {v:work.QDR_LC_TOP} syn_hier {hard}
define_attribute          {v:work.RAM_18D} syn_hier {hard}
define_attribute          {v:work.v2p_qdr2_input_buffer} syn_hier {hard}
define_attribute          {v:work.write_burst_4} syn_hier {hard}
define_global_attribute          syn_edif_bit_format {%n(%i)}

#
# Compile Points
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# Other Constraints
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