data_read_controller_32bit.v

XILINX memory interface generator. XILINX的外部存储器接口。

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//--  Xilinx, Inc. 2002                 www.xilinx.com
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//--    File   name   :   data_read_controller_32bit.v.v 
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//--  Description :     This module generates all the control signals  for the 
//--                     read data path.
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//--  Date - revision : 10/16/2003
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//--  Author :          Maria George ( Modified by SAilaja)
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