ep1c6_32_vga.qsf

VHDL入门实验。256色VGA显示驱动 开发软件Quartus II 6.0 芯片EP2c8Q208

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		ep1c6_32_vga_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "5.0 SP1.04"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:32:43  SEPTEMBER 02, 2006"
set_global_assignment -name LAST_QUARTUS_VERSION 6.0
set_global_assignment -name VHDL_FILE vga.vhd

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_23 -to clock
set_location_assignment PIN_150 -to disp_dato[0]
set_location_assignment PIN_160 -to disp_dato[1]
set_location_assignment PIN_161 -to disp_dato[2]
set_location_assignment PIN_162 -to disp_dato[3]
set_location_assignment PIN_163 -to disp_dato[4]
set_location_assignment PIN_164 -to disp_dato[5]
set_location_assignment PIN_165 -to disp_dato[6]
set_location_assignment PIN_168 -to disp_dato[7]
set_location_assignment PIN_151 -to hsync
set_location_assignment PIN_152 -to vsync

# Timing Assignments
# ==================
set_global_assignment -name IGNORE_CLOCK_SETTINGS ON

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name TOP_LEVEL_ENTITY vga

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP2C8Q208C8
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS OUTPUT DRIVING AN UNSPECIFIED SIGNAL"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Timing Analysis Assignments
# ===========================
set_global_assignment -name ENABLE_CLOCK_LATENCY ON

# Assembler Assignments
# =====================
set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE EPCS1
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"