choice_function.vhd

来自「采用VHDL语言写了一个函数发生器的程序。内含有各个模块」· VHDL 代码 · 共 63 行

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity choice_function is
    Port (clk3200,reset,key_route:in std_logic;
	       sin_data,tri_data,asl_data,rec_data:in std_logic_vector(8 downto 0);
			 function_data: out std_logic_vector(8 downto 0));
end choice_function;

architecture Behavioral of choice_function is

type state is (st1,st2);
signal current :state;

begin


process(key_route,clk3200)
variable cnt :integer range 5 downto 0 ;
begin
if reset='0' then
cnt:=1;
current<=st1;
function_data<=sin_data;
elsif rising_edge(clk3200) then

 case current is
   when st1 =>if key_route='0' then current<=st2;
	             else
             
				  case cnt is
				  when 1=>function_data<=sin_data;
              when 2=>function_data<=asl_data;
              when 3=>function_data<=tri_data;
				  when 4=>function_data<=rec_data;

				  when others =>null;
				   
				  end case;
	            end if;  
   when st2 =>if key_route='1' then 
	           cnt:=cnt+1;
				  case cnt is
				  when 1=>function_data<=sin_data;current<=st1;
              when 2=>function_data<=asl_data;current<=st1;
              when 3=>function_data<=tri_data;current<=st1;
				  when 4=>function_data<=rec_data;current<=st1;
				  when 5=>cnt:=1;current<=st1;
				  when others =>null;
				   
				  end case;
				end if;
   when others=>null;
 end case;
 end if;

end process;


end Behavioral;