📄 decode.cpp
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case 0x16: // j label src_A.write(0); src_B.write(0); alu_src.write(0); alu_op.write(3); decode_valid.write(true); branch_target_address.write(longlabel_tmp); br_instruction_address.write(instr_tmp); branch_valid.write(true); printf("\t\t\tID: pc jump to => (%d).", longlabel_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; wait(); branch_target_address.write(pc_reg + 1); decode_valid.write(false); wait(); break; case 0x17: // jal label for procedure call printf("\t\t\tID: j pc(%d) and sp <- pc", longlabel_tmp); cout << " at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; wait(); wait(); break; case 0x18: // jr printf("\t\t\tID: jr and pc <- sp\n"); cout << " at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; wait(); wait(); break; case 0x29: // fadd R1, R2, R3 printf("\t\t\tID: FR%d=FR%d(=%x)+FR%d(=%x)", regC_tmp, regA_tmp, srcA_tmp, regB_tmp, srcB_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(srcA_tmp); src_B.write(srcB_tmp); alu_src.write(regC_tmp); alu_op.write(3); float_valid.write(true); wait(); float_valid.write(false); wait(); break; case 0x2a: // fsub R1, R2, R3 printf("\t\t\tID: FR%d=FR%d(=%x)-FR%d(=%x)", regC_tmp, regA_tmp, srcA_tmp, regB_tmp, srcB_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(srcA_tmp); src_B.write(srcB_tmp); alu_src.write(regC_tmp); alu_op.write(4); float_valid.write(true); wait(); float_valid.write(false); wait(); break; case 0x2b: // fmul R1, R2, R3 printf("\t\t\tID: FR%d=FR%d(=%x)*FR%d(=%x)", regC_tmp, regA_tmp, srcA_tmp, regB_tmp, srcB_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(srcA_tmp); src_B.write(srcB_tmp); alu_src.write(regC_tmp); alu_op.write(5); float_valid.write(true); wait(); float_valid.write(false); wait(); break; case 0x2c: // fdiv R1, R2, R3 printf("\t\t\tID: FR%d=FR%d(=%x)/FR%d(=%x)", regC_tmp, regA_tmp, srcA_tmp, regB_tmp, srcB_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(srcA_tmp); src_B.write(srcB_tmp); alu_src.write(regC_tmp); alu_op.write(6); float_valid.write(true); wait(); float_valid.write(false); wait(); break; case 0x31: // mmxadd R1, R2, R3 printf("\t\t\tID: MR%d=MR%d(=%x)+MR%d(=%x)", regC_tmp, regA_tmp, srcA_tmp, regB_tmp, srcB_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(srcA_tmp); src_B.write(srcB_tmp); alu_src.write(regC_tmp); alu_op.write(3); mmx_valid.write(true); wait(); mmx_valid.write(false); wait(); break; case 0x32: // mmxadds R1, R2, R3 printf("\t\t\tID: MR%d=MR%d(=%x)+MR%d(=%x) Sat", regC_tmp, regA_tmp, srcA_tmp, regB_tmp, srcB_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(srcA_tmp); src_B.write(srcB_tmp); alu_src.write(regC_tmp); alu_op.write(4); mmx_valid.write(true); wait(); mmx_valid.write(false); wait(); break; case 0x33: // mmxsub R1, R2, R3 printf("\t\t\tID: MR%d=MR%d(=%x)-MR%d(=%x)", regC_tmp, regA_tmp, srcA_tmp, regB_tmp, srcB_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(srcA_tmp); src_B.write(srcB_tmp); alu_src.write(regC_tmp); alu_op.write(5); mmx_valid.write(true); wait(); mmx_valid.write(false); wait(); break; case 0x34: // mmxsubs R1, R2, R3 printf("\t\t\tID: MR%d=MR%d(=%x)-MR%d(=%x) Sat", regC_tmp, regA_tmp, srcA_tmp, regB_tmp, srcB_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(srcA_tmp); src_B.write(srcB_tmp); alu_src.write(regC_tmp); alu_op.write(6); mmx_valid.write(true); wait(); mmx_valid.write(false); wait(); break; case 0x35: // pmadd R1, R2, R3 printf("\t\t\tID: MR%d=MR%d(=%x) ,MR%d(=%x) PMADD", regC_tmp, regA_tmp, srcA_tmp, regB_tmp, srcB_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(srcA_tmp); src_B.write(srcB_tmp); alu_src.write(regC_tmp); alu_op.write(7); mmx_valid.write(true); wait(); mmx_valid.write(false); wait(); break; case 0x36: // pack R1, R2, R3 printf("\t\t\tID: MR%d=MR%d(=%x) pack MR%d(=%x)", regC_tmp, regA_tmp, srcA_tmp, regB_tmp, srcB_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(srcA_tmp); src_B.write(srcB_tmp); alu_src.write(regC_tmp); alu_op.write(8); mmx_valid.write(true); wait(); mmx_valid.write(false); wait(); break; case 0x37: // mmxck R1, R2, R3 MMX Chroma Keying printf("\t\t\tID: MR%d=MR%d(=%x) mmxck MR%d(=%x)", regC_tmp, regA_tmp, srcA_tmp, regB_tmp, srcB_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(srcA_tmp); src_B.write(srcB_tmp); alu_src.write(regC_tmp); alu_op.write(9); mmx_valid.write(true); wait(); mmx_valid.write(false); wait(); break; case 0xe0: // flush register printf("\t\t\tID: flush all registers"); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(0); src_B.write(0); alu_src.write(0); alu_op.write(0); for (i = 0; i< 32; i++) { cpu_reg[i] = 0; } wait(); wait(); break; case 0xf0: // ldpid process_number printf("\t\t\tID: ld pid =%d", longlabel_tmp); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(0); src_B.write(0); alu_src.write(0); alu_op.write(0); pid_valid.write(true); decode_valid.write(false); float_valid.write(false); mmx_valid.write(false); pid_data.write(longlabel_tmp); wait(); pid_valid.write(false); wait(); break; case 0xf1: // movi R1, #value printf("\t\t\tID: R%d=%d", regC_tmp, imm_tmp); cout << " at CSIM " << sc_time_stamp() << endl; cout << "\t\t\t-------------------------------" << endl; src_A.write(imm_tmp); src_B.write(0); alu_src.write(regC_tmp); alu_op.write(3); decode_valid.write(true); wait(); decode_valid.write(false); wait(); break; case 0xff: // QUIT printf("\t\t\tID: - SHUTDOWN - "); cout << "at CSIM " << sc_time_stamp() << endl; decode_valid.write(false); float_valid.write(false); mmx_valid.write(false); wait(); printf("\t\t\tID: - PLEASE WAIT ...... - \n"); cout << "\t\t\t-------------------------------" << endl; sc_stop(); printf("\n\n\n////////////////////////////////////////////////////////////////////////////////\n"); wait(); wait(); break; default : printf("\t\t\tID: INVALID OPCODE"); cout << " \n\t\t\t : at CSIM " << sc_time_stamp() << endl; wait(); break; } next_pc.write(true); wait(); } else { next_pc.write(true); wait(); } }} // end of entry function
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