uart.c

ADC图形图像例子

/************************************************************************
 * File: UART.c
 *
 * Copyright: Peak Microtech Corporation
 *
 ***********************************************************************/

#include "net_cfg.h"

/*
Uart Channel 0 Config
UCLK 0: Internal Clock
UCLK 1: External Clock
 */
void UartConfigCh0(U32 config_data, U32 BaudRate)
{
	U32 temp_reg, uUBDR;
	float fUBDR, PLL_Freq;

	// Pin mux Set
	temp_reg = readl(REG_PMCR2); // Pin Mux Control Register2
	writel(REG_PMCR2, (temp_reg &0xffffff3f)); // Pin TX0, RX0

	// for RX, TX Buffer Clear
	while (UartIsTxCh0() == FALSE)
		;
	while (UartIsRxCh0())
		temp_reg = readb(REG_URXB0);

	UART_CH0_OFF(); // Uart Channel0 Stop


	// uart baud rate set, uart config set
	writew(REG_UCON0, (config_data &0x1ff)); // Uart Channel0 Control Register
	if (config_data &EXCLOCK)
	// External Clock
	{

		writew(REG_UBDR0, (CLOCK / (BaudRate *16)) - 1);
	//Uart Channel0 Baud Rate Devisor Register
	}
	else
	// Internal Clock
	{
		temp_reg = readw(REG_PLPGM); // PLL Control Register Read
		PLL_Freq = (float)((((temp_reg >> 8) &0xff) + 8) *14318000) / ((float)((
	(temp_reg >> 2) &0x03f) + 2)*(float)(1 << (temp_reg &0x3)));
		fUBDR = (PLL_Freq / 2) / ((float)BaudRate *16) - 1;
		uUBDR = (U32)fUBDR;
		if ((fUBDR - (float)uUBDR) > 0.6)
			uUBDR += 1;
		writew(REG_UBDR0, uUBDR); //Uart Channel0 Baud Rate Devisor Register
	}
	UART_CH0_ON();
}


/*
Uart Channel 1 Config
UCLK 0: Internal Clock
UCLK 1: External Clock
 */
void UartConfigCh1(U32 config_data, U32 BaudRate)
{
	U32 temp_reg, uUBDR;
	float fUBDR, PLL_Freq;

	// Pin mux Set
	temp_reg = readl(REG_PMCR2); // Pin Mux
	writel(REG_PMCR2, (temp_reg &0xffffffcf)); // Pin TX1, RX1

	// for RX, TX Buffer Clear
	while (UartIsTxCh1() == FALSE)
		;
	while (UartIsRxCh1())
		temp_reg = readb(REG_URXB1);

	UART_CH1_OFF(); // Uart Channel1 Stop

	// uart baud rate set, uart config set
	writew(REG_UCON1, (config_data &0x1ff)); // Uart Channel1 Control Register
	if (config_data &EXCLOCK)
	// External Clock
	{

		writew(REG_UBDR1, (CLOCK / (BaudRate *16)) - 1);
	// Uart Channel1 Baud Rate Devisor Register
	}
	else
	// Internal Clock
	{
		temp_reg = readw(REG_PLPGM); // PLL Control Register Read
		PLL_Freq = (float)((((temp_reg >> 8) &0xff) + 8) *14318000) / ((float)((
	(temp_reg >> 2) &0x03f) + 2)*(float)(1 << (temp_reg &0x3)));
		fUBDR = (PLL_Freq / 2) / ((float)BaudRate *16) - 1;
		uUBDR = (U32)fUBDR;
		if ((fUBDR - (float)uUBDR) > 0.6)
			uUBDR += 1;
		writew(REG_UBDR1, uUBDR); //Uart Channel0 Baud Rate Devisor Register
	}
	UART_CH1_ON();
}


/*
Uart Channel0 Rx Status Read
 */
U8 UartIsRxCh0(void)
{
	U8 temp_reg;

	temp_reg = readb(REG_USTAT0);
	if (temp_reg &0x10)
		return TRUE;
	return FALSE;
}


/*
Uart Channel1 Rx Status Read
 */
U8 UartIsRxCh1(void)
{
	U8 temp_reg;

	temp_reg = readb(REG_USTAT1);
	if (temp_reg &0x10)
		return TRUE;
	return FALSE;
}


/*
Uart Channel0 Tx Status Read
 */
U8 UartIsTxCh0(void)
{
	U8 temp_reg;

	temp_reg = readb(REG_USTAT0);
	if (temp_reg &0x60)
		return FALSE;
	return TRUE;
}


/*
Uart Channel1 Tx Status Read
 */
U8 UartIsTxCh1(void)
{
	U8 temp_reg;

	temp_reg = readb(REG_USTAT1);
	if (temp_reg &0x60)
		return FALSE;
	return TRUE;
}


/*
Uart Channel0 Data Read
 */
U8 UartRxCharCh0()
{
	while (UartIsRxCh0() == FALSE)
		;
	return readb(REG_URXB0);
}


/*
Uart Channel1 Data Read
 */
U8 UartRxCharCh1()
{
	while (UartIsRxCh1() == FALSE)
		;
	return readb(REG_URXB1);
}


/*
Uart Channel0 Data Send
 */
void UartTxCharCh0(U8 tx_data)
{
	while (UartIsTxCh0() == FALSE)
		;
	writeb(REG_UTXB0, tx_data);
}


/*
Uart Channel1 Data Send
 */
void UartTxCharCh1(U8 tx_data)
{
	while (UartIsTxCh1() == FALSE)
		;
	writeb(REG_UTXB1, tx_data);
}


/*
Uart Tx 16Bite FIFO
 */
void UartTxStringCh0(U8 *pt)
{
	U8 tx_count;

	while (*pt)
	{
		while (UartIsTxCh0() == FALSE)
			;
		for (tx_count = 0; (tx_count < 16) &&  *pt; tx_count++)
		{
			writeb(REG_UTXB0,  *pt++);
		}
	}
}


/*
Uart Tx 16Byte FIFO
 */
void UartTxStringCh1(U8 *pt)
{
	U8 tx_count;

	while (*pt)
	{
		while (UartIsTxCh1() == FALSE)
			;
		for (tx_count = 0; (tx_count < 16) &&  *pt; tx_count++)
		{
			writeb(REG_UTXB1,  *pt++);
		}

	}
}


void UartRxStringCh1(U8 *pt)
{
	U8 *pbString2 = pt;
	U8 c;

	while ((c = UartRxCharCh1()) != '\r' && c != '\n')
	{
		if (c == '\b')
		{
			if ((int)pbString2 < (int)pt)
			{
				UartPrintfCh1("\b \b");
				pt--;
			}
		}
		else
		{
			*pt++ = c;
			UartTxCharCh1(c);
		}
	}
	*pt = '\0';
	UartTxCharCh1('\n');
}


void UartPrintfCh0(const char *const format, ...)
{
	char buffer[256];
	char *ptr;
	va_list argptr;

	ptr = buffer;
	va_start(argptr, format);
	vsprintf(ptr, format, argptr);
	va_end(argptr);
	UartTxStringCh0(buffer);
}


void UartPrintfCh1(const char *const format, ...)
{
	U8 buffer[256];
	U8 *ptr;
	va_list argptr;

	ptr = buffer;
	va_start(argptr, format);
	vsprintf(ptr, format, argptr);
	va_end(argptr);
	UartTxStringCh1(ptr);
}


/*
Uart Initial
Data Bit->8, Stop Bit->1, Parity->No Parity, Serial Clock->External Clock, Enable Uart
Baud Rate:bps
 */
void InitUart(void)
{
	UartConfigCh0(DATABIT8 | ENUART | EXCLOCK, BPS115200);
	UartConfigCh1(DATABIT8 | ENUART | EXCLOCK, BPS115200);
	//	UartConfigCh0(DATABIT8 | ENUART, BPS57600);
	//	UartConfigCh1(DATABIT8 | ENUART, BPS57600);
}



void Printf_IPStr(union Ip_Address_Type ip)
{
	IP_Hex2Str(ip);
	UartPrintfCh1(IpStr);
}



void Printf_Hex(unsigned char senddata)
{
	uchar ch;
	ch = senddata >> 4;
	UartTxCharCh1(HexTable[ch]);
	ch = senddata &0x0F;
	UartTxCharCh1(HexTable[ch]);
}


void Printf_PortStr(unsigned int portnum)
{
	Port_Hex2Str(portnum);
	UartPrintfCh1(PortStr);
}

#ifdef _DEBUG
	/************************************************************
	_vgASSERTMSG
	Desc:
	 ************************************************************/
	void _vgASSERTMSG(const char *const funcname, U32 linenumber, const char
	*const msg)
	{
		DebugPrintf(("ASSERT Failed in %s (%ld)\r\n", funcname, linenumber));
		DebugPrintf(("%s\n", msg));
	}

#endif