sreg8.fit

出租车计费器,VHDL实现

-- MAX+plus II Compiler Fit File      
-- Version 9.3 7/23/1999              
-- Compiled: 05/25/2005 16:19:43      

-- Copyright (C) 1988-1999 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "sreg8"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "clk"                          : INPUT_PIN  = 43     ;
    "din0"                         : INPUT_PIN  = 70     ;
    "din1"                         : INPUT_PIN  = 71     ;
    "din2"                         : INPUT_PIN  = 72     ;
    "din3"                         : INPUT_PIN  = 73     ;
    "din4"                         : INPUT_PIN  = 1      ;
    "din5"                         : INPUT_PIN  = 42     ;
    "din6"                         : INPUT_PIN  = 44     ;
    "din7"                         : INPUT_PIN  = 2      ;
    "load"                         : INPUT_PIN  = 84     ;
    "qb"                           : OUTPUT_PIN = 18     ;
    ":12"                          : LOCATION   = LC1_A1 ;  -- reg87
    ":13"                          : LOCATION   = LC8_A1 ;  -- reg86
    ":14"                          : LOCATION   = LC2_A1 ;  -- reg85
    ":15"                          : LOCATION   = LC3_A1 ;  -- reg84
    ":16"                          : LOCATION   = LC4_A1 ;  -- reg83
    ":17"                          : LOCATION   = LC6_A1 ;  -- reg82
    ":18"                          : LOCATION   = LC7_A1 ;  -- reg81
    ":19"                          : LOCATION   = LC5_A1 ;  -- reg80

END;

INTERNAL_INFO "sreg8"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD5P43  : LORAX = "1:FB5->LC1_A1,->LC8_A1,->LC2_A1,->LC3_A1,->LC4_A1,->LC6_A1,->LC7_A1,->LC5_A1|";
    OH4R0P70 : LORAX = "1:G47R0,PA3R0C0->LC5_A1|";
    OH3R0P71 : LORAX = "1:G37R0,PA1R0C0->LC7_A1|";
    OH2R0P72 : LORAX = "1:G46R0,PA4R0C0->LC6_A1|";
    OH0R0P73 : LORAX = "1:G10R0,PA11R0C0->LC4_A1|";
    OD4P1   : LORAX = "1:FB4|2:CH0R0,PA19R0C0->LC3_A1||";
    OD3P42  : LORAX = "1:FB3|2:FH3R0,PA5R0C0->LC2_A1||";
    OD2P44  : LORAX = "1:FB2|2:FH2R0,PA6R0C0->LC8_A1||";
    OD1P2   : LORAX = "1:FB1|2:FH1R0,PA20R0C0->LC1_A1||";
    OD0P84  : LORAX = "1:FB0|2:FH0R0,PA0R0C0->LC1_A1,->LC8_A1,->LC2_A1,->LC3_A1,->LC4_A1,->LC6_A1,->LC7_A1,->LC5_A1||";
    LC5_A1  : LORAX = "1:MSW4R0C0,HHL41R0->OH12R0P18|";
	LC1_A1  : LORAX2 = "X, OD1P2, LC1_A1, OD0P84";
	LC8_A1  : LORAX2 = "X, OD2P44, LC1_A1, OD0P84";
	LC2_A1  : LORAX2 = "X, OD3P42, LC8_A1, OD0P84";
	LC3_A1  : LORAX2 = "X, OD4P1, LC2_A1, OD0P84";
	LC4_A1  : LORAX2 = "X, OH0R0P73, LC3_A1, OD0P84";
	LC6_A1  : LORAX2 = "X, OH2R0P72, LC4_A1, OD0P84";
	LC7_A1  : LORAX2 = "X, OH3R0P71, LC6_A1, OD0P84";
	LC5_A1  : LORAX2 = "X, OH4R0P70, LC7_A1, OD0P84";
END;