📄 drx3973d.lst
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257 (addr), \
258 (val), \
259 DRXDAP_WASI_BROADCAST ) )
260
261 #define WRBLOCK( dev, addr, size, data ) \
262 CHK_ERROR( DRX3973D_DAP.writeBlockFunc( (dev), \
263 (addr), \
264 (size), \
265 (data), \
266 (0) ) )
267
268 /*============================================================================*/
269 /*=== HI COMMAND RELATED DEFINES =============================================*/
270 /*============================================================================*/
271
272 /* TODO find a sensible nr of retries based upon i2c speed */
273 #define DRX3973D_MAX_RETRIES (1000)
274
275 /*-----------------------------------------------------------------------------
276 STATIC VARIABLES
277 ----------------------------------------------------------------------------*/
278
279 /*-----------------------------------------------------------------------------
280 GLOBAL VARIABLES
281 ----------------------------------------------------------------------------*/
282 /**
283 * \var DRX3973D_Func_g
284 * \brief The driver functions of the drx3973D
285 */
286 DRXDemodFunc_t DRX3973DFunctions_g =
287 {
288 0, /* if (typeId == 0) then driver will determine typeId */
289 DRX3973D_Open,
290 DRX3973D_Close,
291 DRX3973D_Ctrl
292 };
293
294 /**
295 * \var DRX3973DData_g
C51 COMPILER V8.02 DRX3973D 02/11/2009 09:42:41 PAGE 6
296 * \brief Extended attributes for a demodulator ot the DRX3973D family.
297 *
298 * Device specific attributes for DRX3973D family. They are initialised
299 * when calling the DRX_Open() function. They must be allocated before
300 * calling the DRX_Open() function.
301 *
302 */
303 DRX3973DData_t DRX3973DData_g =
304 {
305 0, /* expected sysClockFreq */
306 /* HI configuration */
307 0, /* HI Configure() parameter 2 */
308 0, /* HI Configure() parameter 3 */
309 0, /* HI Configure() parameter 4 */
310 0, /* HI Configure() parameter 5 */
311 /* GET/SET Channel */
312 0, /* frequency shifter setting */
313 /* Chip Id */
314 FALSE, /* consumer device flag */
315 /* OC configuration */
316 0, /* shadow EcOcRegOcMpgSio */
317 0, /* shadow EcOcRegOcModeLop */
318 0, /* shadow EcOcRegOcModeHip */
319 0, /* shadow EcOcRegIprInvMpg */
320 0, /* shadow FeAgRegAgPwd */
321 0, /* shadow FeAgRegAgAgcSio */
322 /* UIO configuartion */
323 DRX_UIO_MODE_DISABLE, /* initial UIO mode HI */
324 DRX_UIO_MODE_DISABLE, /* initial UIO mode SC */
325 /* AGC control */
326 { /* IF AGC settings */
327 DRX3973D_AGC_CTRL_AUTO, /* ctrlMode */
328 0, /* level */
329 0, /* min */
330 0, /* max */
331 0 /* speed */
332 },
333 { /* RF AGC settings */
334 DRX3973D_AGC_CTRL_AUTO, /* ctrlMode */
335 0, /* level */
336 0, /* min */
337 0, /* max */
338 0 /* speed */
339 },
340 DRX3973D_CSCD_INIT, /* system clock deviation FSM */
341 0, /* current bandwidth selection */
342 FALSE, /* ignore lock status for SigQuality */
343 #ifndef _CH_
344 { /* version stuff: human readable version */
345 "01234567890",
346 "01234567890"
347 },
348 { /* version stuff: version info structs */
349 {
350 DRX_MODULE_UNKNOWN,
351 NULL,
352 0,
353 0,
354 0,
355 NULL
356 },
357 {
C51 COMPILER V8.02 DRX3973D 02/11/2009 09:42:41 PAGE 7
358 DRX_MODULE_UNKNOWN,
359 NULL,
360 0,
361 0,
362 0,
363 NULL
364 }
365 },
366 { /* version stuff: version info list */
367 {
368 NULL,
369 NULL
370 },
371 {
372 NULL,
373 NULL
374 }
375 }
376 #endif /* _CH_ */
377 };
378
379 /**
380 * \var DRX3973DDefaultAddr_g
381 * \brief Default I2C address and device identifier.
382 */
383 I2CDeviceAddr_t DRX3973DDefaultAddr_g = {
384 DRX3973D_DEF_I2C_ADDR, /* i2c address */
385 DRX3973D_DEF_DEMOD_DEV_ID /* device id */
386 };
387
388 /**
389 * \var DRX3973DDefaultCommAttr_g
390 * \brief Default common attributes of a drx3973d demodulator instance.
391 */
392 DRXCommonAttr_t DRX3973DDefaultCommAttr_g = {
393 (pu8_t)NULL, /* ucode ptr */
394 0, /* ucode size */
395 TRUE, /* ucode verify switch */
396 0, /* IF in kHz in case no tuner instance is used */
397 48000L, /* system clock frequency in kHz */
398 20000L, /* oscillator frequency kHz*/
399 0L, /* oscillator deviation in ppm, signed */
400 FALSE, /* If TRUE mirror frequency spectrum */
401
402 /* MPEG output configuration */
403 TRUE, /* If TRUE, enable MPEG ouput */
404 TRUE, /* If TRUE, insert RS byte */
405 TRUE, /* If TRUE, parallel out otherwise serial */
406 FALSE, /* If TRUE, invert DATA signals */
407 FALSE, /* If TRUE, invert ERR signal */
408 FALSE, /* If TRUE, invert STR signals */
409 FALSE, /* If TRUE, invert VAL signals */
410 FALSE, /* If TRUE, invert CLK signals */
411
412 FALSE, /* isOpened */
413
414 /* Scan */
415 NULL, /* no scan params yet */
416 0, /* current scan index */
417 0, /* next scan frequency */
418 FALSE, /* scan ready flag */
419 0L, /* max channels to scan */
C51 COMPILER V8.02 DRX3973D 02/11/2009 09:42:41 PAGE 8
420 0L, /* nr of channels scanned */
421 0, /* millisec to wait for demod lock */
422 DRX3973D_DEMOD_LOCK, /* desired lock */
423 FALSE, /* scan routines active or not */
424
425 /* Power management */
426 DRX_POWER_DOWN,
427
428 /* Tuner */
429 1, /* nr of I2C port to wich tuner is */
430 0L, /* minimum RF input frequency, in kHz */
431 0L /* maximum RF input frequency, in kHz */
432 };
433
434
435 /**
436 * \var DRX3973DDefaultDemod_g
437 * \brief Default drx3973d demodulator instance.
438 */
439 DRXDemodInstance_t DRX3973DDefaultDemod_g = {
440 &DRX3973DFunctions_g, /* demod functions */
441 &DRX3973D_DAP, /* data access protocol functions */
442 NULL, /* tuner instance */
443 &DRX3973DDefaultAddr_g, /* i2c address & device id */
444 &DRX3973DDefaultCommAttr_g, /* demod common attributes */
445 &DRX3973DData_g /* demod device specific attributes */
446 };
447
448 /*-----------------------------------------------------------------------------
449 STRUCTURES
450 ----------------------------------------------------------------------------*/
451
452 typedef struct {
453 u16_t cmd;
454 u16_t param1;
455 u16_t param2;
456 u16_t param3;
457 u16_t param4;
458 u16_t param5;
459 } DRX3973DHiCmd_t, *pDRX3973DHiCmd_t;
460
461 /*-----------------------------------------------------------------------------
462 FUNCTIONS
463 ----------------------------------------------------------------------------*/
464 /* Some prototypes */
465 static DRXStatus_t CtrlI2CBridge( pDRXDemodInstance_t demod,
466 pBool_t bridgeClosed );
467
468 static DRXStatus_t CtrlUIOWrite( pDRXDemodInstance_t demod,
469 pDRXUIOData_t UIOData);
470
471 static DRXStatus_t CtrlLockStatus( pI2CDeviceAddr_t devAddr,
472 pDRXLockStatus_t lockStat );
473
474 static DRXStatus_t HI_CfgCommand(const pDRXDemodInstance_t demod);
475
476 static DRXStatus_t
477 CtrlSetCfgIfAgc( pDRXDemodInstance_t demod, pDRX3973DCfgAgc_t cfg );
478
479 static DRXStatus_t
480 CtrlSetCfgRfAgc( pDRXDemodInstance_t demod, pDRX3973DCfgAgc_t cfg );
481
C51 COMPILER V8.02 DRX3973D 02/11/2009 09:42:41 PAGE 9
482 static DRXStatus_t
483 HI_Command(const pI2CDeviceAddr_t devAddr,
484 const pDRX3973DHiCmd_t cmd,
485 pu16_t result);
486
487 /*=============================================================================
488 =============================================================================
489 ===== HELPER FUNCTIONS ======================================================
490 =============================================================================
491 ===========================================================================*/
492
493 /*============================================================================*/
494
495 /**
496 * \fn void WaitMilliSec()
497 * \brief Wait (loop) at least n millisec
498 * \param n millisec to wait
499 *
500 */
501 static DRXStatus_t WaitMilliSec(u16_t n)
502 {
503 1 u32_t start=0;
504 1 u32_t current=0;
505 1 u32_t delta=0;
506 1
507 1 start = DRXBSP_HST_Clock();
508 1
509 1 do{
510 2 current = DRXBSP_HST_Clock();
511 2 delta = current - start;
512 2 } while( delta < n );
513 1
514 1 return (DRX_STS_OK);
515 1 }
516
517 /*============================================================================*/
518
519
520 /**
521 * \fn void Mult32(u32_t a, u32_t b, pu32_t h, pu32_t l)
522 * \brief 32bitsx32bits signed multiplication
523 * \param a 32 bits multiplicant
524 * \param b 32 bits multiplier
525 * \param h pointer to high part 64 bits result
526 * \param l pointer to low part 64 bits result
527 */
528
529 static void Mult32(u32_t a, u32_t b, ps32_t h, pu32_t l)
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