setfun.vhd

来自「能够产生方波、三角波、正弦波、及阶梯波」· VHDL 代码 · 共 30 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY setfun IS
	PORT(     set:in std_logic;
	     In1,In2,In3,In4:in std_logic_vector(7 downto 0);
		        q:out std_logic_vector(7 downto 0));
	END ENTITY setfun;
ARCHITECTURE behave OF setfun IS
	signal j:integer range 0 to 3;
	BEGIN
		process(set)
			begin
			   if set'event and set='1' then
				if j<3 then j<=j+1;
				else j<=0;
				end if;
			   end if;
			end process;
		process(j,In1,In2,In3,In4)
			begin
				case j is
				when 0=>q<=In1;--正弦波形输出
				when 1=>q<=In2;--三角波形输出
				when 2=>q<=In3;--方波输出
				when 3=>q<=In4;--阶梯波形输出
				when others=>q<=null;
				end case;
			end process;
	END behave;