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📄 vga_sync.v

📁 该项目在VGA显示器上显示8色竖彩条。使用VerilogHDL语言编写
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/*
 *  Copyright (C) 2006-2008 CMM Sigma Andrzej Chmielowiec <cmmsigma@cmmsigma.eu>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 3
 *  as published by the Free Software Foundation.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  If you want to use this code under other conditions, please contact 
 *  CMM Sigma <cmmsigma@cmmsigma.eu>.
 */

/*
 * This module contains logic functions which are needed 
 * to send signals during VGA interface.
 *
 * Module paramters
 * ================
 *
 * H_PIXELS - 
 *   Number of pixels in horizontal mode.
 *
 * H_FRONT - 
 *   Number of pixels before horizontal synchronization 
 *   signal.
 *
 * H_SYNC - 
 *   Number of pixels during horizontal synchronization 
 *   signal.
 *
 * H_BACK - 
 *   Number of pixels after horizontal synchronization 
 *   signal.
 *
 * V_LINES - 
 *   Number of lines in vertical mode.
 *
 * V_FRONT - 
 *   Number of lines before vertical synchronization 
 *   signal.
 *
 * V_SYNC - 
 *   Number of lines during vertical synchronization 
 *   signal.
 *
 * V_BACK - 
 *   Number of lines after vertical synchronization 
 *   signal.
 *
 *
 * Module signals
 * ==============
 *
 * hSync[out] - 
 *   Horizontal synchronization of VGA display.
 *
 * vSync[out] -
 *   Vertical synchronization of VGA display.
 *
 * redOut[out] -
 *   Red color component for given pixel.
 *
 * greenOut[out] - 
 *   Green color component for given pixel.
 *
 * blueOut[out] - 
 *   Blue color component for given pixel.
 *
 * pixel[out] - 
 *   Number of pixel which is actualy displayed (pixels  
 *   are numbered from 0 from left side of the screen).
 *
 * line[out] -
 *   Number of line which is actualy displayed (lines are 
 *   numbered from 0 from top of the screen).
 *
 * redIn[in] - 
 *   Red color component for given pixel. If pixel is 
 *   invisible, then this signal is ignored and redOut 
 *   is 1'b0.
 *
 * greenIn[in] - 
 *   Green color component for given pixel. If pixel is 
 *   invisible, then this signal is ignored and greenOut 
 *   is 1'b0.
 *
 * blueIn[in] - 
 *   Blue color component for given pixel. If pixel is 
 *   invisible, then this signal is ignored and blueOut 
 *   is 1'b0.
 *
 * clk[in] - 
 *   Clock signal adequate for pixel density (25.175 for 
 *   640x480 at 60Hz).
 */
module VgaSync #
(
	parameter H_PIXELS = 640,
	parameter H_FRONT = 16,
	parameter H_SYNC = 96,
	parameter H_BACK = 48,
	parameter H_SYNC_VALUE = 1'b0,
	parameter V_LINES = 480,
	parameter V_FRONT = 10,
	parameter V_SYNC = 2,
	parameter V_BACK = 33,
	parameter V_SYNC_VALUE = 1'b0
)
(
	output reg hSync,
	output reg vSync,
	output reg redOut,
	output reg greenOut,
	output reg blueOut,
	output reg [11:0] pixel,
	output reg [11:0] line,
	input redIn,
	input greenIn,
	input blueIn,
	input clk
);

	`define H_A (H_PIXELS)
	`define H_B (`H_A + H_FRONT)
	`define H_C (`H_B + H_SYNC)
	`define H_D (`H_C + H_BACK)

	`define V_A (V_LINES)
	`define V_B (`V_A + V_FRONT)
	`define V_C (`V_B + V_SYNC)
	`define V_D (`V_C + V_BACK)

	reg signal = 1'b1;

	/*
	 *   DDDDDDDDD...DDDDDDDDDDDDDDDDDDDDD-----HHH-----
	 *   DDDDDDDDD...DDDDDDDDDDDDDDDDDDDDD-----HHH-----
	 *   DDDDDDDDD...DDDDDDDDDDDDDDDDDDDDD-----HHH-----
	 *             .                            .
	 *             .                            .
	 *             .                            .
	 *   DDDDDDDDD...DDDDDDDDDDDDDDDDDDDDD-----HHH-----
	 *   DDDDDDDDD...DDDDDDDDDDDDDDDDDDDDD-----HHH-----
	 *   --------------------------------------HHH-----
	 *   --------------------------------------HHH-----
	 *   VVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVXXXVVVVV
	 *   VVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVXXXVVVVV
	 *   --------------------------------------HHH-----
	 *   --------------------------------------HHH-----
	 *
	 * D - video is displayed.
	 * H - only horizontal synchronization.
	 * V - only vertical synchronization.
	 * X - both horizontal and vertical synchronization.
	 *
	 */

	always @(posedge clk) begin

		if (pixel == `H_D - 1) begin
			if (line < `V_A) begin
				signal = 1;
				line = line + 1'b1;
			end
			else if (line == `V_B - 1) begin
				vSync = V_SYNC_VALUE;
				line = line + 1'b1;
			end
			else if (line == `V_C - 1) begin
				vSync = ~V_SYNC_VALUE;
				line = line + 1'b1;
			end
			else if (line == `V_D - 1) begin
				line = 0;
			end
			else begin
				line = line + 1'b1;
			end

			pixel = 0;
		end
		else if (pixel == `H_A - 1) begin
			signal = 0;
			redOut = 0;
			greenOut = 0;
			blueOut = 0;
			pixel = pixel + 1'b1;
		end
		else if (pixel == `H_B - 1) begin
			hSync = H_SYNC_VALUE;
			pixel = pixel + 1'b1;
		end
		else if (pixel == `H_C - 1) begin
			hSync = ~H_SYNC_VALUE;
			pixel = pixel + 1'b1;
		end
		else if (signal == 1) begin
			redOut = redIn;
			greenOut = greenIn;
			blueOut = blueIn;
			pixel = pixel + 1'b1;
		end
		else begin
			pixel = pixel + 10'b1;
		end

	end

endmodule

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