📄 prev_cmp_pci.qmsg
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{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0_in\[5\] PCI.vhd(179) " "Info (10041): Inferred latch for \"P0_in\[5\]\" at PCI.vhd(179)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 179 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0_in\[6\] PCI.vhd(179) " "Info (10041): Inferred latch for \"P0_in\[6\]\" at PCI.vhd(179)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 179 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0_in\[7\] PCI.vhd(179) " "Info (10041): Inferred latch for \"P0_in\[7\]\" at PCI.vhd(179)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 179 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0\[0\] PCI.vhd(179) " "Info (10041): Inferred latch for \"P0\[0\]\" at PCI.vhd(179)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 179 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0\[1\] PCI.vhd(179) " "Info (10041): Inferred latch for \"P0\[1\]\" at PCI.vhd(179)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 179 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0\[2\] PCI.vhd(179) " "Info (10041): Inferred latch for \"P0\[2\]\" at PCI.vhd(179)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 179 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0\[3\] PCI.vhd(179) " "Info (10041): Inferred latch for \"P0\[3\]\" at PCI.vhd(179)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 179 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0\[4\] PCI.vhd(179) " "Info (10041): Inferred latch for \"P0\[4\]\" at PCI.vhd(179)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 179 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0\[5\] PCI.vhd(179) " "Info (10041): Inferred latch for \"P0\[5\]\" at PCI.vhd(179)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 179 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0\[6\] PCI.vhd(179) " "Info (10041): Inferred latch for \"P0\[6\]\" at PCI.vhd(179)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 179 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0\[7\] PCI.vhd(179) " "Info (10041): Inferred latch for \"P0\[7\]\" at PCI.vhd(179)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 179 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0_out\[0\] PCI.vhd(115) " "Info (10041): Inferred latch for \"P0_out\[0\]\" at PCI.vhd(115)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 115 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0_out\[1\] PCI.vhd(115) " "Info (10041): Inferred latch for \"P0_out\[1\]\" at PCI.vhd(115)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 115 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0_out\[2\] PCI.vhd(115) " "Info (10041): Inferred latch for \"P0_out\[2\]\" at PCI.vhd(115)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 115 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0_out\[3\] PCI.vhd(115) " "Info (10041): Inferred latch for \"P0_out\[3\]\" at PCI.vhd(115)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 115 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0_out\[4\] PCI.vhd(115) " "Info (10041): Inferred latch for \"P0_out\[4\]\" at PCI.vhd(115)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 115 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0_out\[5\] PCI.vhd(115) " "Info (10041): Inferred latch for \"P0_out\[5\]\" at PCI.vhd(115)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 115 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0_out\[6\] PCI.vhd(115) " "Info (10041): Inferred latch for \"P0_out\[6\]\" at PCI.vhd(115)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 115 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "P0_out\[7\] PCI.vhd(115) " "Info (10041): Inferred latch for \"P0_out\[7\]\" at PCI.vhd(115)" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 115 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "frame_a irdy_a " "Info: Duplicate register \"frame_a\" merged to single register \"irdy_a\"" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 49 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} } { } 0 0 "Duplicate registers merged to single register" 0 0 "" 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "frame_signal irdy_signal " "Info: Duplicate register \"frame_signal\" merged to single register \"irdy_signal\"" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 48 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} } { } 0 0 "Duplicate registers merged to single register" 0 0 "" 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "CLK_IN " "Info: Promoted clock signal driven by pin \"CLK_IN\" to global clock signal" { } { } 0 0 "Promoted clock signal driven by pin \"%1!s!\" to global clock signal" 0 0 "" 0} } { } 0 0 "Promoted pin-driven signal(s) to global signal" 0 0 "" 0}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "6 " "Warning: Design contains 6 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "P2\[4\] " "Warning (15610): No output dependent on input pin \"P2\[4\]\"" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 10 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "P2\[5\] " "Warning (15610): No output dependent on input pin \"P2\[5\]\"" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 10 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "P2\[6\] " "Warning (15610): No output dependent on input pin \"P2\[6\]\"" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 10 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "P2\[7\] " "Warning (15610): No output dependent on input pin \"P2\[7\]\"" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 10 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "INT0 " "Warning (15610): No output dependent on input pin \"INT0\"" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 14 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "INTA " "Warning (15610): No output dependent on input pin \"INTA\"" { } { { "PCI.vhd" "" { Text "H:/PCI/PCI.vhd" 19 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} } { } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "219 " "Info: Implemented 219 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "14 " "Info: Implemented 14 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "9 " "Info: Implemented 9 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_BIDIRS" "40 " "Info: Implemented 40 bidirectional pins" { } { } 0 0 "Implemented %1!d! bidirectional pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_MCELLS" "150 " "Info: Implemented 150 macrocells" { } { } 0 0 "Implemented %1!d! macrocells" 0 0 "" 0} { "Info" "ICUT_CUT_TM_SEXPS" "6 " "Info: Implemented 6 shareable expanders" { } { } 0 0 "Implemented %1!d! shareable expanders" 0 0 "" 0} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 13 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 13 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "159 " "Info: Allocated 159 megabytes of memory during processing" { } { } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Jan 15 18:21:20 2009 " "Info: Processing ended: Thu Jan 15 18:21:20 2009" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Jan 15 18:21:21 2009 " "Info: Processing started: Thu Jan 15 18:21:21 2009" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off PCI -c PCI " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off PCI -c PCI" { } { } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "PCI EPM3512AQC208-7 " "Info: Selected device EPM3512AQC208-7 for design \"PCI\"" { } { } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "144 " "Info: Allocated 144 megabytes of memory during processing" { } { } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Jan 15 18:21:22 2009 " "Info: Processing ended: Thu Jan 15 18:21:22 2009" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Jan 15 18:21:23 2009 " "Info: Processing started: Thu Jan 15 18:21:23 2009" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off PCI -c PCI " "Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off PCI -c PCI" { } { } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Info: Assembler is generating device programming files" { } { } 0 0 "Assembler is generating device programming files" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II " "Info: Quartus II Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "124 " "Info: Allocated 124 megabytes of memory during processing" { } { } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Jan 15 18:21:24 2009 " "Info: Processing ended: Thu Jan 15 18:21:24 2009" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Jan 15 18:21:25 2009 " "Info: Processing started: Thu Jan 15 18:21:25 2009" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off PCI -c PCI " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off PCI -c PCI" { } { } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" { } { } 0 0 "Started post-fitting delay annotation" 0 0 "" 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" { } { } 0 0 "Delay annotation completed successfully" 0 0 "" 0}
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