dp_test.fit.qmsg

本程序是用VHDL语言编写的

{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "Servo_Phase_A Global clock " "Info: Automatically promoted some destinations of signal \"Servo_Phase_A\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "servo_cp_test " "Info: Destination \"servo_cp_test\" may be non-global or may not use global clock" {  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 46 -1 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0}  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 43 -1 0 } }  } 0 0 "Automatically promoted some destinations of signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_PIN_USES_INTERNAL_GLOBAL" "Servo_Phase_A " "Info: Pin \"Servo_Phase_A\" drives global clock, but is not placed in a dedicated clock pin position" {  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 43 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "Servo_Phase_A" } } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "dp_test" "UNKNOWN" "V1" "E:/dp_test/db/dp_test.quartus_db" { Floorplan "E:/dp_test/" "" "" { Servo_Phase_A } "NODE_NAME" } "" } } { "E:/dp_test/dp_test.fld" "" { Floorplan "E:/dp_test/dp_test.fld" "" "" { Servo_Phase_A } "NODE_NAME" } }  } 0 0 "Pin \"%1!s!\" drives global clock, but is not placed in a dedicated clock pin position" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "A_servo_cp_clr Global clock " "Info: Automatically promoted some destinations of signal \"A_servo_cp_clr\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "A_ccw_test " "Info: Destination \"A_ccw_test\" may be non-global or may not use global clock" {  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 451 -1 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "A_servo_cp_clr " "Info: Destination \"A_servo_cp_clr\" may be non-global or may not use global clock" {  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 140 -1 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "A_cp_number\[0\] " "Info: Destination \"A_cp_number\[0\]\" may be non-global or may not use global clock" {  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 480 -1 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "A_cp_number\[1\] " "Info: Destination \"A_cp_number\[1\]\" may be non-global or may not use global clock" {  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 480 -1 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "A_cp_number\[2\] " "Info: Destination \"A_cp_number\[2\]\" may be non-global or may not use global clock" {  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 480 -1 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "A_cp_number\[3\] " "Info: Destination \"A_cp_number\[3\]\" may be non-global or may not use global clock" {  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 480 -1 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "A_cp_number\[4\] " "Info: Destination \"A_cp_number\[4\]\" may be non-global or may not use global clock" {  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 480 -1 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "A_cp_number\[5\] " "Info: Destination \"A_cp_number\[5\]\" may be non-global or may not use global clock" {  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 480 -1 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "A_cp_number\[6\] " "Info: Destination \"A_cp_number\[6\]\" may be non-global or may not use global clock" {  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 480 -1 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "A_cp_number\[7\] " "Info: Destination \"A_cp_number\[7\]\" may be non-global or may not use global clock" {  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 480 -1 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_LIMITED_TO_SUB" "10 " "Info: Limited to 10 non-global destinations" {  } {  } 0 0 "Limited to %1!d! non-global destinations" 0 0}  } { { "dp_test.vhd" "" { Text "E:/dp_test/dp_test.vhd" 140 -1 0 } }  } 0 0 "Automatically promoted some destinations of signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0 0 "Fitter is using %2!s! packing mode for logic elements with %1!s! setting for Auto Packed Registers logic option" 0 0}
{ "Info" "IFSAC_FSAC_START_LUT_PACKING" "" "Info: Moving registers into LUTs to improve timing and density" {  } {  } 0 0 "Moving registers into LUTs to improve timing and density" 0 0}
{ "Info" "IFYGR_FYGR_NO_REGS_IN_IOS_HEADER" "" "Info: Started processing fast register assignments" {  } {  } 0 0 "Started processing fast register assignments" 0 0}
{ "Info" "IFYGR_FYGR_NO_REGS_IN_IOS_FOOTER" "" "Info: Finished processing fast register assignments" {  } {  } 0 0 "Finished processing fast register assignments" 0 0}
{ "Info" "IFSAC_FSAC_FINISH_LUT_PACKING" "" "Info: Finished moving registers into LUTs" {  } {  } 0 0 "Finished moving registers into LUTs" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" {  } {  } 0 0 "Finished register packing" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0}