dp_test.tan.summary

本程序是用VHDL语言编写的

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : -0.813 ns
From           : mcu_nwr
To             : A_servo[7]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 20.837 ns
From           : A_moto[2]
To             : Moto_A_dir
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 10.964 ns
From           : rst
To             : Moto_A_dir
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 7.934 ns
From           : servo_poisition[8]
To             : data[8]~reg0
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 101.47 MHz ( period = 9.855 ns )
From           : A_moto_count[7]
To             : A_moto_cp
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'Servo_Phase_A'
Slack          : N/A
Required Time  : None
Actual Time    : 201.09 MHz ( period = 4.973 ns )
From           : A_servo_cp_ccw[3]
To             : A_servo_cp_ccw[8]
From Clock     : Servo_Phase_A
To Clock       : Servo_Phase_A
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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