dp_test.map.summary

来自「本程序是用VHDL语言编写的」· SUMMARY 代码 · 共 10 行

Analysis & Synthesis Status : Successful - Wed Dec 10 13:32:32 2008
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : dp_test
Top-level Entity Name : dp_test
Family : MAX II
Total logic elements : 302
Total pins : 70
Total virtual pins : 0
UFM blocks : 0