dma2.c

samsung 最新芯片2450 的测试程序.

		printf("\b\b\b\b\b\b\b\b%08x",(rDSTAT0&0xfffff));
		}
	printf("\nM2M Done\n");

	rINTSUBMSK=BIT_SUB_ALLMSK;
	rINTMSK=BIT_ALLMSK;

	for(i=d_addr;i<(d_addr+tot_sz);i+=4)
	{
			mSum1[0]+=*((U32 *)i);
	}

	if(mSum0[0]==mSum1[0])
		printf("[Ch: 0, Size: %d Byte] DMA test (Handshake, Single service) O.K.\n",tot_sz);
	else 
		printf("[Ch: 0, Size: %d Byte] DMA test (Handshake, Single service) ERROR!!!\n",tot_sz);
}

void DMA_M2M_ExtREQ4(void)
{
	U32 i, temp;
	U32 s_addr;
	U32 d_addr;
	U32 tot_sz;
	U32 tc,tsz;

#if 0 //nXDREQ 0
	rGPBUDP = rGPBUDP & ~(0xf<<18)|(0x0<<18);
	rGPBDAT |= (3<<9);
	rGPBCON = (rGPBCON & ~(0xf<<18))|(0xf<<18);
#else if //nXDREQ1
	rGPBUDP = rGPBUDP & ~(0xf<<14)|(0x0<<14);
	rGPBDAT |= (3<<7);
	rGPBCON = (rGPBCON & ~(0xf<<14))|(0xa<<14);
#endif	

	
	pISR_DMA=(int)Dma0End;

	rINTSUBMSK&=~(BIT_SUB_DMA0);
	rINTMSK&=~(BIT_DMA);  

	tot_sz=0x10;
	s_addr=_NONCACHE_STARTADDRESS;
	d_addr=_NONCACHE_STARTADDRESS+tot_sz;


	tsz=0;	// Unit Transfer
	tc=tot_sz/((tsz?4:1)*2);	//	 case DBYTE :

	dmaEnd[0]=1;
	mSum0[0]=0;
	mSum1[0]=0;

	// Destination Memory Clear
	for(i=d_addr;i<(d_addr+tot_sz);i+=4)
		*((U32 *)i)=0;

	for(i=s_addr;i<(s_addr+tot_sz);i+=4)
	{
			*((U32 *)i)=i^0x55aa5aa5;
			mSum0[0]+=*((U32 *)i);
	}

	rDISRC0=s_addr;
	rDISRCC0=(0<<1)|(0<<0); // AHB, INC
	rDIDST0=d_addr;
	rDIDSTC0=(0<<1)|(0<<0); // AHB, INC
	rDCON0=(0<<31)|(0<<30)|(1<<29)|(tsz<<28)|(1<<27)|(0<<22)|(1<<20)|(tc);
		   //Demand|APB|InterruptEn|TransferSize|SingleServ|RelaodOn|DByte|TransferCount
	#if 0
	rDMAREQSEL0=(17<<1)|(1<<0); //nXDREQ0
	#else if
	rDMAREQSEL0=(18<<1)|(1<<0); //nXDREQ1
	#endif
	
	rDMASKTRIG0=(1<<1); //DMA on

	printf("Waiting for nXDREQ\n");
	///////////////////////////////////////////////////////////////////////////////
	printf("Current TC : ");
	printf("%08x",(rDSTAT0&0xfffff));

	while(dmaEnd[0]) {
		temp= rDSTAT0&0xfffff;
//		printf("0x%08x\n",(rDSTAT0&0xfffff));
		if(Uart_GetKey()) break;
		if(temp!=(rDSTAT0&0xfffff))
		printf("\b\b\b\b\b\b\b\b%08x",(rDSTAT0&0xfffff));
		}
	printf("\nM2M Done\n");

	rINTSUBMSK=BIT_SUB_ALLMSK;
	rINTMSK=BIT_ALLMSK;

	for(i=d_addr;i<(d_addr+tot_sz);i+=4)
	{
			mSum1[0]+=*((U32 *)i);
	}

	if(mSum0[0]==mSum1[0])
		printf("[Ch: 0, Size: %d KB] DMA test (Demand, Single service) O.K.\n",tot_sz/1024);
	else 
		printf("[Ch: 0, Size: %d KB] DMA test (Demand, Single service) ERROR!!!\n",tot_sz/1024);
}

static void __irq Dma0AutoReload(void)
{
    rSUBSRCPND|=BIT_SUB_DMA6;
    ClearPending(BIT_DMA);
    dCnt++;
    if(dCnt>1) dmaEnd[0]=0;
    else {
	rDMASKTRIG6 |= 1;
	DSTAT0_mon1 = rDSTAT6;
	DCSRC0_mon1 = rDCSRC6;
	DCDST0_mon1 = rDCDST6;
    	}
    printf(".");
}

void Test_DMAWorst(void)
{
    int i;

    printf("[DMA01234567 MEM2MEM Worst Test]\n");

    dmaDone=0;

    for(i=_NONCACHE_STARTADDRESS;i<_NONCACHE_STARTADDRESS+0x1000000;i+=4)
    {
    	*((U32 *)i)=i^0x55aa5aa5;
		//*((U32 *)i)=i;
    }

    //Start DMA ch0,1,2,3 simultaneously.
    	DMA0123_M2M(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x80000,0x80000,0,0); //byte,single
   	//DMA0123_M2M(0, _NONCACHE_STARTADDRESS, _NONCACHE_STARTADDRESS + 0x100000, 0x10000,0, 0);

}




void DMA0123_M2M(int ch,int srcAddr,int dstAddr,int tc,int dsz,int burst)
{
    int i,time;
    volatile U32 memSum0=0,memSum1=0;
    DMA2 *pDMA;
    int length;
    
    length=tc*(burst ? 4:1)*((dsz==0)+(dsz==1)*2+(dsz==2)*4);
    //rINTMSK &=~(BIT_DMA);//sjs
    //pISR_DMA=(int)DmaDone;    
    
    switch(ch)
    {
    case 0:
    	pISR_DMA=(int)WorstDmaDone;
	rINTSUBMSK &=~(BIT_SUB_DMA0); 
	rINTMSK &=~(BIT_DMA);
    	pDMA=(void *)0x4B000000;
    	break;
    case 1:
    	pISR_DMA=(int)WorstDmaDone;
	rINTSUBMSK &=~(BIT_SUB_DMA1); 
    	rINTMSK &=~(BIT_DMA);  
	pDMA=(void *)0x4B000100;
    	break;
    case 2:
	pISR_DMA=(int)WorstDmaDone;
	rINTSUBMSK &=~(BIT_SUB_DMA2); 
	rINTMSK &=~(BIT_DMA);
    	pDMA=(void *)0x4B000200;
	break;
    case 3:
        pISR_DMA=(int)WorstDmaDone;
	rINTSUBMSK &=~(BIT_SUB_DMA3); 
       rINTMSK &=~(BIT_DMA);
	pDMA=(void *)0x4B000300;
        break;
    case 4:
    	pISR_DMA=(int)WorstDmaDone;
	rINTSUBMSK &=~(BIT_SUB_DMA4); 
	rINTMSK &=~(BIT_DMA);
    	pDMA=(void *)0x4B000400;
    	break;
    case 5:
    	pISR_DMA=(int)WorstDmaDone;
	rINTSUBMSK &=~(BIT_SUB_DMA5); 
    	rINTMSK &=~(BIT_DMA);  
	pDMA=(void *)0x4B000500;
    	break;
    case 6:
	pISR_DMA=(int)WorstDmaDone;
	rINTSUBMSK &=~(BIT_SUB_DMA6); 
	rINTMSK &=~(BIT_DMA);
    	pDMA=(void *)0x4B000600;
	break;
    case 7:
        pISR_DMA=(int)WorstDmaDone;
	rINTSUBMSK &=~(BIT_SUB_DMA7); 
       rINTMSK &=~(BIT_DMA);
	pDMA=(void *)0x4B000700;
        break;
    }
                                                                                                                            
    pDMA->DISRC=srcAddr;
    pDMA->DISRCC=(0<<1)|(0<<0); // inc,AHB
    pDMA->DIDST=dstAddr;
    pDMA->DIDSTC=(0<<1)|(0<<0); // inc,AHB
    pDMA->DCON=(1<<31)|(1<<30)|(1<<29)|(burst<<28)|(1<<27)|(0<<23)|(1<<22)|(dsz<<20)|(tc);

      		//HS,AHB,TC interrupt,whole, SW request mode,relaod off
    //pDMA->DMASKTRIG=(1<<1)|1; //DMA on, SW_TRIG

/*
	for(i=srcAddr;i<srcAddr+length;i+=4)
		{
		*((U32 *)i)=i;
		memSum0+=i;
		}
*/
//	printf("#");

	switch(ch)
	{
	case 0:
	    //DMA Ch 1
		DMA0123_M2M(1,_NONCACHE_STARTADDRESS+0x100000,_NONCACHE_STARTADDRESS+0x200000,0xfffff,0,0); //halfword,single
		//DMA0123_M2M(1, _NONCACHE_STARTADDRESS+0x40000, _NONCACHE_STARTADDRESS + 0x140000, 0xfffff,1, 0);
		break;
	case 1:
		//DMA Ch 2
			DMA0123_M2M(2,_NONCACHE_STARTADDRESS+0x300000,_NONCACHE_STARTADDRESS+0x400000,0xc0000,0,0); //word,single
		//DMA0123_M2M(2, _NONCACHE_STARTADDRESS+0x80000, _NONCACHE_STARTADDRESS + 0x180000, 0xfffff,2, 0);
		break;
	case 2:
	    //DMA Ch 3
	    	DMA0123_M2M(3,_NONCACHE_STARTADDRESS+0x500000,_NONCACHE_STARTADDRESS+0x600000,0x80000,0,0); //word,burst
			//DMA0123_M2M(3, _NONCACHE_STARTADDRESS+0xC0000, _NONCACHE_STARTADDRESS + 0x1C0000, 0xfffff,2, 1);
		break;
	case 3:
	    //DMA Ch 4
	    	DMA0123_M2M(4,_NONCACHE_STARTADDRESS+0x700000,_NONCACHE_STARTADDRESS+0x800000,0x40000,0,0); //word,burst
			//DMA0123_M2M(3, _NONCACHE_STARTADDRESS+0xC0000, _NONCACHE_STARTADDRESS + 0x1C0000, 0xfffff,2, 1);
		break;
	case 4:
	    //DMA Ch 5
	    	DMA0123_M2M(5,_NONCACHE_STARTADDRESS+0x900000,_NONCACHE_STARTADDRESS+0xa00000,0x8000,0,0); //word,burst
			//DMA0123_M2M(3, _NONCACHE_STARTADDRESS+0xC0000, _NONCACHE_STARTADDRESS + 0x1C0000, 0xfffff,2, 1);
		break;
	case 5:
	    //DMA Ch 6
	    	DMA0123_M2M(6,_NONCACHE_STARTADDRESS+0xb00000,_NONCACHE_STARTADDRESS+0xc00000,0x4000,0,0); //word,burst
			//DMA0123_M2M(3, _NONCACHE_STARTADDRESS+0xC0000, _NONCACHE_STARTADDRESS + 0x1C0000, 0xfffff,2, 1);
		break;
	case 6:
	    //DMA Ch 7
	    	DMA0123_M2M(7,_NONCACHE_STARTADDRESS+0xd00000,_NONCACHE_STARTADDRESS+0xf00000,0x2000,0,0); //word,burst
			//DMA0123_M2M(3, _NONCACHE_STARTADDRESS+0xC0000, _NONCACHE_STARTADDRESS + 0x1C0000, 0xfffff,2, 1);
		break;
	
	case 7:
		
	    	rDMASKTRIG0=(1<<1)|1;
		rDMASKTRIG1=(1<<1)|1;
	    	rDMASKTRIG2=(1<<1)|1;
	    	rDMASKTRIG3=(1<<1)|1;
		rDMASKTRIG4=(1<<1)|1;
		rDMASKTRIG5=(1<<1)|1;
	    	rDMASKTRIG6=(1<<1)|1;
	    	rDMASKTRIG7=(1<<1)|1;
		break;	

	default:
		break;
	}
    
	for(i=srcAddr;i<(srcAddr+length);i+=4)
		{
		memSum0+=*((U32 *)i);
		}

	while(dmaDone!=0xff);

	rINTMSK=BIT_ALLMSK;
	rINTSUBMSK=BIT_SUB_ALLMSK;


	for(i=dstAddr;i<dstAddr+length;i+=4)
		{
		memSum1+=*((U32 *)i);
		}

	printf("\nDMA%d %8xh->%8xh,size=%xh(tc=%xh),dsz=%d,burst=%d\n",ch,srcAddr,dstAddr,length,tc,dsz,burst);
	printf("memSum0=%x,memSum1=%x\n",memSum0,memSum1);
	if(memSum0==memSum1)
		printf("DMA test result--------------------------------------O.K.\n");
	else 
		printf("DMA test result--------------------------------------ERROR!!!\n");

}


static void __irq Dma0End(void)
{
     rSUBSRCPND|=BIT_SUB_DMA0;
     ClearPending(BIT_DMA);
      dmaEnd[0]=0;
}
#if 0
static void __irq Dma1End(void)
{
     rSUBSRCPND|=BIT_SUB_DMA1;
    ClearPending(BIT_DMA);
    dmaEnd[1]=0;
}

static void __irq Dma2End(void)
{
     rSUBSRCPND|=BIT_SUB_DMA2;
    ClearPending(BIT_DMA);
    dmaEnd[2]=0;
}

static void __irq Dma3End(void)
{
     rSUBSRCPND|=BIT_SUB_DMA3;
    ClearPending(BIT_DMA);
    dmaEnd[3]=0;
}

static void __irq Dma4End(void)
{
     rSUBSRCPND|=BIT_SUB_DMA4;
    ClearPending(BIT_DMA);
    dmaEnd[4]=0;
}

static void __irq Dma5End(void)
{
     rSUBSRCPND|=BIT_SUB_DMA5;
    ClearPending(BIT_DMA);
    dmaEnd[5]=0;
}

static void __irq Dma6End(void)
{
     rSUBSRCPND|=BIT_SUB_DMA6;
    ClearPending(BIT_DMA);
    dmaEnd[6]=0;
}

static void __irq Dma7End(void)
{
     rSUBSRCPND|=BIT_SUB_DMA7;
    ClearPending(BIT_DMA);
    dmaEnd[7]=0;
}
#endif

static void __irq WorstDmaDone(void)
{
	//int i;
//	printf("\n1=%x",rSUBSRCPND);
	rINTSUBMSK|=(BIT_SUB_DMA0|BIT_SUB_DMA1|BIT_SUB_DMA2|BIT_SUB_DMA3|BIT_SUB_DMA4|BIT_SUB_DMA5|BIT_SUB_DMA6|BIT_SUB_DMA7);
	rINTMSK|=(BIT_DMA);
	//i=rSUBSRCPND;
	if(rSUBSRCPND&(1<<18)) 
	{
	       printf("\n0");
		rSUBSRCPND=BIT_SUB_DMA0;
		dmaDone+=1;
	}
	else if(rSUBSRCPND&(1<<19)) 
	{
		printf("\n1");
		rSUBSRCPND=BIT_SUB_DMA1;
		dmaDone+=2;
	}
	else if(rSUBSRCPND&(1<<20)) 
	{
		printf("\n2");
		rSUBSRCPND=BIT_SUB_DMA2;
		dmaDone+=4;
	}
	else if(rSUBSRCPND&(1<<21)) 
	{
		printf("\n3");
		rSUBSRCPND=BIT_SUB_DMA3;
		dmaDone+=8;
	}
	if(rSUBSRCPND&(1<<22)) 
	{
		printf("\n4");
		rSUBSRCPND=BIT_SUB_DMA4;
		dmaDone+=16;
	}
	else if(rSUBSRCPND&(1<<23)) 
	{
		printf("\n5");
		rSUBSRCPND=BIT_SUB_DMA5;
		dmaDone+=32;
	}
	else if(rSUBSRCPND&(1<<29)) 
	{
		printf("\n6");
		rSUBSRCPND=BIT_SUB_DMA6;
		dmaDone+=64;
	}
	else if(rSUBSRCPND&(1<<30)) 
	{
		printf("\n7");
		rSUBSRCPND=BIT_SUB_DMA7;
		dmaDone+=128;
	}
	else
	{
//		printf("DMA SUB INT Fail\n");
	}
	ClearPending(BIT_DMA);
	rINTMSK &= ~(BIT_DMA);
	rINTSUBMSK &= ~(BIT_SUB_DMA0|BIT_SUB_DMA1|BIT_SUB_DMA2|BIT_SUB_DMA3|BIT_SUB_DMA4|BIT_SUB_DMA5|BIT_SUB_DMA6|BIT_SUB_DMA7);
//	printf("\n2=%x",rSUBSRCPND);
}